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Searched refs:cfg0 (Results 1 – 25 of 36) sorted by relevance

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/linux-6.15/drivers/clk/thead/
H A Dclk-th1520-ap.c39 u16 cfg0; member
248 regmap_read(pll->common.map, pll->common.cfg0, &cfg0); in th1520_pll_vco_recalc_rate()
271 regmap_read(pll->common.map, pll->common.cfg0, &cfg0); in th1520_pll_postdiv_recalc_rate()
307 .cfg0 = 0x000,
319 .cfg0 = 0x010,
331 .cfg0 = 0x020,
351 .cfg0 = 0x030,
371 .cfg0 = 0x040,
387 .cfg0 = 0x050,
403 .cfg0 = 0x060,
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/linux-6.15/drivers/edac/
H A Docteon_edac-lmc.c40 union cvmx_lmcx_mem_cfg0 cfg0; in octeon_lmc_edac_poll() local
45 if (cfg0.s.sec_err || cfg0.s.ded_err) { in octeon_lmc_edac_poll()
54 if (cfg0.s.sec_err) { in octeon_lmc_edac_poll()
57 cfg0.s.sec_err = -1; /* Done, re-arm */ in octeon_lmc_edac_poll()
61 if (cfg0.s.ded_err) { in octeon_lmc_edac_poll()
64 cfg0.s.ded_err = -1; /* Done, re-arm */ in octeon_lmc_edac_poll()
238 union cvmx_lmcx_mem_cfg0 cfg0; in octeon_lmc_edac_probe() local
240 cfg0.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(0)); in octeon_lmc_edac_probe()
241 if (!cfg0.s.ecc_ena) { in octeon_lmc_edac_probe()
264 cfg0.s.intr_ded_ena = 0; /* We poll */ in octeon_lmc_edac_probe()
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/linux-6.15/drivers/spi/
H A Dspi-qpic-snand.c98 u32 cfg0; member
522 snandc->regs->cfg0 = cpu_to_le32(cfg0); in qcom_spi_read_last_cw()
669 snandc->regs->cfg0 = cpu_to_le32(cfg0); in qcom_spi_read_cw_raw()
780 cfg0 = (ecc_cfg->cfg0 & ~(7U << CW_PER_PAGE)) | in qcom_spi_read_page_ecc()
788 snandc->regs->cfg0 = cpu_to_le32(cfg0); in qcom_spi_read_page_ecc()
876 cfg0 = (ecc_cfg->cfg0 & ~(7U << CW_PER_PAGE)) | in qcom_spi_read_page_oob()
884 snandc->regs->cfg0 = cpu_to_le32(cfg0); in qcom_spi_read_page_oob()
1005 snandc->regs->cfg0 = cpu_to_le32(cfg0); in qcom_spi_program_raw()
1070 cfg0 = (ecc_cfg->cfg0 & ~(7U << CW_PER_PAGE)) | in qcom_spi_program_ecc()
1089 snandc->regs->cfg0 = cpu_to_le32(cfg0); in qcom_spi_program_ecc()
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/linux-6.15/drivers/usb/typec/mux/
H A Dps883x.c61 static int ps883x_configure(struct ps883x_retimer *retimer, int cfg0, in ps883x_configure() argument
67 ret = regmap_write(retimer->regmap, REG_USB_PORT_CONN_STATUS_0, cfg0); in ps883x_configure()
90 int cfg0 = CONN_STATUS_0_CONNECTION_PRESENT; in ps883x_set() local
96 return ps883x_configure(retimer, cfg0, cfg1, cfg2); in ps883x_set()
103 cfg0 |= CONN_STATUS_0_ORIENTATION_REVERSED; in ps883x_set()
107 cfg0 |= CONN_STATUS_0_USB_3_1_CONNECTED; in ps883x_set()
118 cfg0 |= CONN_STATUS_0_USB_3_1_CONNECTED; in ps883x_set()
134 return ps883x_configure(retimer, cfg0, cfg1, cfg2); in ps883x_set()
/linux-6.15/arch/mips/ralink/
H A Dmt7620.c223 u32 cfg0; in prom_soc_init() local
231 cfg0 = __raw_readl(MT7620_SYSC_BASE + SYSC_REG_SYSTEM_CONFIG0); in prom_soc_init()
233 dram_type = cfg0 & DRAM_TYPE_MT7628_MASK; in prom_soc_init()
235 dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & in prom_soc_init()
/linux-6.15/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramnv10.c31 u32 cfg0 = nvkm_rd32(device, 0x100200); in nv10_ram_new() local
34 if (cfg0 & 0x00000001) in nv10_ram_new()
/linux-6.15/drivers/net/wireless/realtek/rtw89/
H A Dpci_be.c411 u32 ctrl0, cfg0, cfg1, dec_ctrl, idle_ltcy, act_ltcy, dis_ltcy; in rtw89_pci_ltr_set_v2() local
416 cfg0 = rtw89_read32(rtwdev, R_BE_LTR_CFG_0); in rtw89_pci_ltr_set_v2()
417 if (rtw89_pci_ltr_is_err_reg_val(cfg0)) in rtw89_pci_ltr_set_v2()
446 cfg0 = u32_replace_bits(cfg0, PCI_LTR_IDLE_TIMER_3_2MS, in rtw89_pci_ltr_set_v2()
450 cfg0 = u32_replace_bits(cfg0, 1, B_BE_LTR_IDX_ACTIVE_MASK); in rtw89_pci_ltr_set_v2()
451 cfg0 = u32_replace_bits(cfg0, 3, B_BE_LTR_IDX_IDLE_MASK); in rtw89_pci_ltr_set_v2()
458 rtw89_write32(rtwdev, R_BE_LTR_CFG_0, cfg0); in rtw89_pci_ltr_set_v2()
/linux-6.15/arch/loongarch/mm/
H A Dcache.c94 #define populate_cache_properties(cfg0, cdesc, level, leaf) \ argument
102 if (cfg0 & LXIUPRIV) \
104 if (cfg0 & LXIUINCL) \
/linux-6.15/drivers/infiniband/hw/erdma/
H A Derdma_hw.h257 u32 cfg0; member
285 u32 cfg0; member
310 u32 cfg0; member
357 u32 cfg0; member
411 u32 cfg0; member
H A Derdma_verbs.c51 req.cfg0 = FIELD_PREP(ERDMA_CMD_CREATE_QP_SQ_DEPTH_MASK, in create_qp_cmd()
160 req.cfg0 = FIELD_PREP(ERDMA_CMD_MR_VALID_MASK, mr->valid) | in regmr_cmd()
180 req.cfg0 |= FIELD_PREP(ERDMA_CMD_MR_VERSION_MASK, 1); in regmr_cmd()
202 req.cfg0 = FIELD_PREP(ERDMA_CMD_CREATE_CQ_CQN_MASK, cq->cqn) | in create_cq_cmd()
208 req.cfg0 |= FIELD_PREP(ERDMA_CMD_CREATE_CQ_PAGESIZE_MASK, in create_cq_cmd()
221 req.cfg0 |= in create_cq_cmd()
2170 av_cfg->cfg0 = FIELD_PREP(ERDMA_CMD_CREATE_AV_FL_MASK, av->flow_label) | in erdma_set_av_cfg()
H A Derdma_qp.c226 req.cfg0 = FIELD_PREP(ERDMA_CMD_MODIFY_QP_QPN_MASK, QP_ID(qp)); in modify_qp_cmd_rocev2()
229 req.cfg0 |= FIELD_PREP(ERDMA_CMD_MODIFY_QP_STATE_MASK, in modify_qp_cmd_rocev2()
/linux-6.15/drivers/net/wireless/mediatek/mt76/mt76x2/
H A Dphy.c187 u32 cfg0, cfg1; in mt76x2_configure_tx_delay() local
190 cfg0 = bw ? 0x000b0c01 : 0x00101101; in mt76x2_configure_tx_delay()
193 cfg0 = bw ? 0x000b0b01 : 0x00101001; in mt76x2_configure_tx_delay()
196 mt76_wr(dev, MT_TX_SW_CFG0, cfg0); in mt76x2_configure_tx_delay()
/linux-6.15/drivers/gpu/drm/exynos/
H A Dexynos_drm_fimc.c1011 u32 cfg0, cfg1; in fimc_start() local
1023 cfg0 = fimc_read(ctx, EXYNOS_MSCTRL); in fimc_start()
1024 cfg0 &= ~EXYNOS_MSCTRL_INPUT_MASK; in fimc_start()
1025 cfg0 |= EXYNOS_MSCTRL_INPUT_MEMORY; in fimc_start()
1026 fimc_write(ctx, cfg0, EXYNOS_MSCTRL); in fimc_start()
1031 cfg0 = fimc_read(ctx, EXYNOS_CIIMGCPT); in fimc_start()
1032 cfg0 &= ~EXYNOS_CIIMGCPT_IMGCPTEN_SC; in fimc_start()
1033 cfg0 |= EXYNOS_CIIMGCPT_IMGCPTEN_SC; in fimc_start()
1044 cfg0 |= EXYNOS_CIIMGCPT_IMGCPTEN; in fimc_start()
1045 fimc_write(ctx, cfg0, EXYNOS_CIIMGCPT); in fimc_start()
/linux-6.15/drivers/mtd/nand/raw/
H A Dqcom_nandc.c110 u32 cfg0, cfg1; member
261 __le32 cmd, cfg0, cfg1, ecc_bch_cfg; in update_rw_regs() local
274 cfg0 = cpu_to_le32((host->cfg0 & ~CW_PER_PAGE_MASK) | in update_rw_regs()
280 cfg0 = cpu_to_le32((host->cfg0_raw & ~CW_PER_PAGE_MASK) | in update_rw_regs()
288 nandc->regs->cfg0 = cfg0; in update_rw_regs()
313 qcom_write_reg_dma(nandc, &nandc->regs->cfg0, NAND_DEV0_CFG0, 3, 0); in config_nand_page_read()
373 qcom_write_reg_dma(nandc, &nandc->regs->cfg0, NAND_DEV0_CFG0, 3, 0); in config_nand_page_write()
884 host->cfg0 &= ~(SPARE_SIZE_BYTES_MASK | UD_SIZE_BYTES_MASK); in qcom_nandc_codeword_fixup()
1497 host->cfg0 = FIELD_PREP(CW_PER_PAGE_MASK, (cwperpage - 1)) | in qcom_nand_attach_chip()
1545 host->cfg0, host->cfg1, host->ecc_buf_cfg, host->ecc_bch_cfg, in qcom_nand_attach_chip()
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/linux-6.15/drivers/net/phy/
H A Ddp83640.c116 int cfg0; member
553 u16 cfg0 = 0, ver; in enable_status_frames() local
556 cfg0 = PSF_EVNT_EN | PSF_RXTS_EN | PSF_TXTS_EN | ENDIAN_FLAG; in enable_status_frames()
562 ext_write(0, phydev, PAGE5, PSF_CFG0, cfg0); in enable_status_frames()
636 u16 cal_gpio, cfg0, evnt, ptp_trig, trigger, val; in recalibrate() local
652 tmp->cfg0 = ext_read(tmp->phydev, PAGE5, PSF_CFG0); in recalibrate()
657 cfg0 = ext_read(master, PAGE5, PSF_CFG0); in recalibrate()
729 ext_write(0, tmp->phydev, PAGE5, PSF_CFG0, tmp->cfg0); in recalibrate()
730 ext_write(0, master, PAGE5, PSF_CFG0, cfg0); in recalibrate()
/linux-6.15/arch/sparc/include/asm/
H A Dsbi.h20 /* 0x0010 */ u32 cfg0; /* Slot0 config reg */ member
/linux-6.15/drivers/soc/qcom/
H A Dqcom-geni-se.c433 u32 cfg0, cfg1, cfg[NUM_PACKING_VECTORS] = {0}; in geni_se_config_packing() local
461 cfg0 = cfg[0] | (cfg[1] << PACKING_VECTOR_SHIFT); in geni_se_config_packing()
465 writel_relaxed(cfg0, se->base + SE_GENI_TX_PACKING_CFG0); in geni_se_config_packing()
469 writel_relaxed(cfg0, se->base + SE_GENI_RX_PACKING_CFG0); in geni_se_config_packing()
/linux-6.15/sound/pci/au88x0/
H A Dau88x0_core.c1096 dma->cfg0 = 0; in vortex_adbdma_setbuffers()
1109 dma->cfg0 |= 0x12000000; in vortex_adbdma_setbuffers()
1117 dma->cfg0 |= 0x88000000 | 0x44000000 | 0x10000000 | (psize - 1); in vortex_adbdma_setbuffers()
1124 dma->cfg0 |= 0x80000000 | 0x40000000 | ((psize - 1) << 0xc); in vortex_adbdma_setbuffers()
1134 hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFCFG0 + (adbdma << 3), dma->cfg0); in vortex_adbdma_setbuffers()
1375 dma->cfg0 = 0; in vortex_wtdma_setbuffers()
1387 dma->cfg0 |= 0x12000000; in vortex_wtdma_setbuffers()
1394 dma->cfg0 |= 0x88000000 | 0x44000000 | 0x10000000 | (psize-1); in vortex_wtdma_setbuffers()
1400 dma->cfg0 |= 0x80000000 | 0x40000000 | ((psize-1) << 0xc); in vortex_wtdma_setbuffers()
1405 hwwrite(vortex->mmio, VORTEX_WTDMA_BUFCFG0 + (wtdma << 3), dma->cfg0); in vortex_wtdma_setbuffers()
H A Dau88x0.h111 int cfg0; member
/linux-6.15/include/linux/
H A Dswitchtec.h231 struct partition_info cfg0; member
258 struct partition_info cfg0; member
/linux-6.15/drivers/net/wireless/realtek/rtl8xxxu/
H A D8710b.c574 u32 cfg0, cfg2, vendor; in rtl8710bu_identify_chip() local
584 cfg0 = rtl8710b_read_syson_reg(priv, REG_SYS_SYSTEM_CFG0_8710B); in rtl8710bu_identify_chip()
585 priv->chip_cut = cfg0 & 0xf; in rtl8710bu_identify_chip()
587 if (cfg0 & BIT(16)) { in rtl8710bu_identify_chip()
592 vendor = u32_get_bits(cfg0, 0xc0); in rtl8710bu_identify_chip()
/linux-6.15/drivers/pci/controller/
H A Dpcie-altera.c379 u8 cfg0 = read ? pcie->pcie_data->cfgrd0 : pcie->pcie_data->cfgwr0; in get_tlp_header() local
384 cfg = (bus == pcie->root_bus_nr) ? cfg0 : cfg1; in get_tlp_header()
386 cfg = (bus > S10_RP_SECONDARY(pcie)) ? cfg0 : cfg1; in get_tlp_header()
/linux-6.15/include/linux/mtd/
H A Dnand-qpic-common.h310 __le32 cfg0; member
/linux-6.15/drivers/pinctrl/intel/
H A Dpinctrl-intel.c344 u32 cfg0, cfg1, mode; in intel_pin_dbg_show() local
353 cfg0 = readl(intel_get_padcfg(pctrl, pin, PADCFG0)); in intel_pin_dbg_show()
356 mode = (cfg0 & PADCFG0_PMODE_MASK) >> PADCFG0_PMODE_SHIFT; in intel_pin_dbg_show()
362 seq_printf(s, "0x%08x 0x%08x", cfg0, cfg1); in intel_pin_dbg_show()
/linux-6.15/drivers/net/wireless/ath/ath11k/
H A Ddebugfs_htt_stats.c4660 cfg_params->cfg0 = HTT_STAT_DEFAULT_CFG0_ALL_HWQS; in ath11k_prep_htt_stats_cfg_params()
4663 cfg_params->cfg0 = HTT_STAT_DEFAULT_CFG0_ALL_TXQS; in ath11k_prep_htt_stats_cfg_params()
4666 cfg_params->cfg0 = HTT_STAT_DEFAULT_CFG0_ALL_CMDQS; in ath11k_prep_htt_stats_cfg_params()
4669 cfg_params->cfg0 = HTT_STAT_PEER_INFO_MAC_ADDR; in ath11k_prep_htt_stats_cfg_params()
4670 cfg_params->cfg0 |= FIELD_PREP(GENMASK(15, 1), in ath11k_prep_htt_stats_cfg_params()
4682 cfg_params->cfg0 = HTT_STAT_DEFAULT_CFG0_ALL_RINGS; in ath11k_prep_htt_stats_cfg_params()
4685 cfg_params->cfg0 = HTT_STAT_DEFAULT_CFG0_ACTIVE_PEERS; in ath11k_prep_htt_stats_cfg_params()
4691 cfg_params->cfg0 = HTT_STAT_DEFAULT_CFG0_ACTIVE_VDEVS; in ath11k_prep_htt_stats_cfg_params()
4694 cfg_params->cfg0 = HTT_STAT_PEER_INFO_MAC_ADDR; in ath11k_prep_htt_stats_cfg_params()
4867 cfg_params.cfg0 = HTT_STAT_DEFAULT_RESET_START_OFFSET; in ath11k_write_htt_stats_reset()
[all …]

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