Searched refs:cdclk_state (Results 1 – 9 of 9) sorted by relevance
2953 cdclk_state->actual = cdclk_state->logical; in vlv_modeset_calc_cdclk()2982 cdclk_state->actual = cdclk_state->logical; in bdw_modeset_calc_cdclk()3053 cdclk_state->actual = cdclk_state->logical; in skl_modeset_calc_cdclk()3092 cdclk_state->actual = cdclk_state->logical; in bxt_modeset_calc_cdclk()3118 cdclk_state = kmemdup(obj->state, sizeof(*cdclk_state), GFP_KERNEL); in intel_cdclk_duplicate_state()3119 if (!cdclk_state) in intel_cdclk_duplicate_state()3125 return &cdclk_state->base; in intel_cdclk_duplicate_state()3146 if (IS_ERR(cdclk_state)) in intel_atomic_get_cdclk_state()3192 if (IS_ERR(cdclk_state)) in intel_cdclk_state_set_joined_mbus()3205 cdclk_state = kzalloc(sizeof(*cdclk_state), GFP_KERNEL); in intel_cdclk_init()[all …]
262 const struct intel_cdclk_state *cdclk_state; in hsw_ips_compute_config() local264 cdclk_state = intel_atomic_get_cdclk_state(state); in hsw_ips_compute_config()265 if (IS_ERR(cdclk_state)) in hsw_ips_compute_config()266 return PTR_ERR(cdclk_state); in hsw_ips_compute_config()269 if (crtc_state->pixel_rate > cdclk_state->logical.cdclk * 95 / 100) in hsw_ips_compute_config()
86 struct intel_cdclk_state *cdclk_state; in intel_display_driver_init_hw() local91 cdclk_state = to_intel_cdclk_state(display->cdclk.obj.state); in intel_display_driver_init_hw()95 cdclk_state->logical = cdclk_state->actual = display->cdclk.hw; in intel_display_driver_init_hw()
1264 const struct intel_cdclk_state *cdclk_state; in intel_bw_calc_min_cdclk() local1309 cdclk_state = intel_atomic_get_cdclk_state(state); in intel_bw_calc_min_cdclk()1310 if (IS_ERR(cdclk_state)) in intel_bw_calc_min_cdclk()1311 return PTR_ERR(cdclk_state); in intel_bw_calc_min_cdclk()1321 if (new_min_cdclk <= cdclk_state->bw_min_cdclk) in intel_bw_calc_min_cdclk()1326 new_min_cdclk, cdclk_state->bw_min_cdclk); in intel_bw_calc_min_cdclk()
283 const struct intel_cdclk_state *cdclk_state; in intel_plane_calc_min_cdclk() local308 cdclk_state = intel_atomic_get_cdclk_state(state); in intel_plane_calc_min_cdclk()309 if (IS_ERR(cdclk_state)) in intel_plane_calc_min_cdclk()310 return PTR_ERR(cdclk_state); in intel_plane_calc_min_cdclk()321 cdclk_state->min_cdclk[crtc->pipe]) in intel_plane_calc_min_cdclk()329 cdclk_state->min_cdclk[crtc->pipe]); in intel_plane_calc_min_cdclk()
939 struct intel_cdclk_state *cdclk_state; in glk_force_audio_cdclk_commit() local947 cdclk_state = intel_atomic_get_cdclk_state(state); in glk_force_audio_cdclk_commit()948 if (IS_ERR(cdclk_state)) in glk_force_audio_cdclk_commit()949 return PTR_ERR(cdclk_state); in glk_force_audio_cdclk_commit()951 cdclk_state->force_min_cdclk = enable ? 2 * 96000 : 0; in glk_force_audio_cdclk_commit()
1544 const struct intel_cdclk_state *cdclk_state; in intel_fbc_check_plane() local1546 cdclk_state = intel_atomic_get_cdclk_state(state); in intel_fbc_check_plane()1547 if (IS_ERR(cdclk_state)) in intel_fbc_check_plane()1548 return PTR_ERR(cdclk_state); in intel_fbc_check_plane()1550 if (crtc_state->pixel_rate >= cdclk_state->logical.cdclk * 95 / 100) { in intel_fbc_check_plane()
2302 const struct intel_cdclk_state *cdclk_state; in cdclk_prefill_adjustment() local2304 cdclk_state = intel_atomic_get_cdclk_state(state); in cdclk_prefill_adjustment()2305 if (IS_ERR(cdclk_state)) { in cdclk_prefill_adjustment()2306 drm_WARN_ON(display->drm, PTR_ERR(cdclk_state)); in cdclk_prefill_adjustment()2311 2 * cdclk_state->logical.cdclk)); in cdclk_prefill_adjustment()
4132 const struct intel_cdclk_state *cdclk_state) in hsw_ips_linetime_wm() argument4142 cdclk_state->logical.cdclk); in hsw_ips_linetime_wm()4176 const struct intel_cdclk_state *cdclk_state; in hsw_compute_linetime_wm() local4186 cdclk_state = intel_atomic_get_cdclk_state(state); in hsw_compute_linetime_wm()4187 if (IS_ERR(cdclk_state)) in hsw_compute_linetime_wm()4188 return PTR_ERR(cdclk_state); in hsw_compute_linetime_wm()4191 cdclk_state); in hsw_compute_linetime_wm()