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Searched refs:cdclk (Results 1 – 25 of 29) sorted by relevance

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/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_cdclk.c637 int cdclk = cdclk_config->cdclk; in vlv_set_cdclk() local
727 int cdclk = cdclk_config->cdclk; in chv_set_cdclk() local
1214 display->cdclk.hw.cdclk == display->cdclk.hw.bypass) in skl_sanitize_cdclk()
1234 display->cdclk.hw.cdclk = 0; in skl_sanitize_cdclk()
1543 table[i].cdclk == cdclk) in bxt_calc_cdclk_pll_vco()
1898 table[i].cdclk == cdclk) in cdclk_squash_waveform()
2224 display->cdclk.hw.cdclk == display->cdclk.hw.bypass) in bxt_sanitize_cdclk()
2228 cdclk = bxt_calc_cdclk(display, display->cdclk.hw.cdclk); in bxt_sanitize_cdclk()
2229 if (cdclk != display->cdclk.hw.cdclk) in bxt_sanitize_cdclk()
2261 display->cdclk.hw.cdclk = 0; in bxt_sanitize_cdclk()
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H A Dintel_cdclk.h20 unsigned int cdclk, vco, ref, bypass; member
93 …to_intel_cdclk_state(intel_atomic_get_old_global_obj_state(state, &to_intel_display(state)->cdclk.…
95 …to_intel_cdclk_state(intel_atomic_get_new_global_obj_state(state, &to_intel_display(state)->cdclk.…
H A Dintel_audio.c443 unsigned int fec_coeff, cdclk, vdsc_bppx16; in calc_hblank_early_prog() local
451 cdclk = display->cdclk.hw.cdclk; in calc_hblank_early_prog()
459 h_active, link_clk, lanes, FXP_Q4_ARGS(vdsc_bppx16), cdclk); in calc_hblank_early_prog()
461 if (WARN_ON(!link_clk || !pixel_clk || !lanes || !vdsc_bppx16 || !cdclk)) in calc_hblank_early_prog()
470 hblank_delta = DIV64_U64_ROUND_UP(mul_u32_u32(5 * (link_clk + cdclk), pixel_clk), in calc_hblank_early_prog()
471 mul_u32_u32(link_clk, cdclk)); in calc_hblank_early_prog()
914 static void get_aud_ts_cdclk_m_n(int refclk, int cdclk, struct aud_ts_cdclk_m_n *aud_ts) in get_aud_ts_cdclk_m_n() argument
917 aud_ts->n = cdclk * aud_ts->m / 24000; in get_aud_ts_cdclk_m_n()
925 get_aud_ts_cdclk_m_n(display->cdclk.hw.ref, in intel_audio_cdclk_change_post()
926 display->cdclk.hw.cdclk, &aud_ts); in intel_audio_cdclk_change_post()
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H A Dintel_display_driver.c91 cdclk_state = to_intel_cdclk_state(display->cdclk.obj.state); in intel_display_driver_init_hw()
94 intel_cdclk_dump_config(display, &display->cdclk.hw, "Current CDCLK"); in intel_display_driver_init_hw()
95 cdclk_state->logical = cdclk_state->actual = display->cdclk.hw; in intel_display_driver_init_hw()
458 if (display->cdclk.max_cdclk_freq == 0) in intel_display_driver_probe_nogem()
H A Dintel_display_core.h297 const struct intel_cdclk_funcs *cdclk; member
356 } cdclk; member
H A Dhsw_ips.c216 crtc_state->pixel_rate > display->cdclk.max_cdclk_freq * 95 / 100) in hsw_crtc_state_ips_capable()
269 if (crtc_state->pixel_rate > cdclk_state->logical.cdclk * 95 / 100) in hsw_ips_compute_config()
H A Dintel_dsi.c67 int max_dotclk = display->cdclk.max_dotclk_freq; in intel_dsi_mode_valid()
H A Dintel_pmdemand.c325 (new_cdclk_state->actual.cdclk != in intel_pmdemand_needs_update()
326 old_cdclk_state->actual.cdclk || in intel_pmdemand_needs_update()
386 DIV_ROUND_UP(new_cdclk_state->actual.cdclk, 1000); in intel_pmdemand_atomic_check()
H A Dintel_dp_aux.c105 freq = display->cdclk.hw.cdclk; in ilk_get_aux_clock_divider()
H A Dintel_backlight.c1113 clock = KHz(display->cdclk.hw.cdclk); in i9xx_hz_to_pwm()
1131 clock = KHz(display->cdclk.hw.cdclk); in i965_hz_to_pwm()
H A Dintel_dvo.c227 int max_dotclk = display->cdclk.max_dotclk_freq; in intel_dvo_mode_valid()
H A Dintel_lvds.c402 int max_pixclk = display->cdclk.max_dotclk_freq; in intel_lvds_mode_valid()
H A Dintel_crt.c360 int max_dotclk = display->cdclk.max_dotclk_freq; in intel_crt_mode_valid()
H A Dintel_dp.c908 max_bpp = display->cdclk.max_cdclk_freq * ppc * bigjoiner_interface_bits(display) / in bigjoiner_bw_max_bpp()
1033 if (mode_clock >= ((display->cdclk.max_cdclk_freq * 85) / 100)) in intel_dp_dsc_get_slice_count()
1367 return clock > num_joined_pipes * display->cdclk.max_dotclk_freq || in intel_dp_needs_joiner()
1421 int max_dotclk = display->cdclk.max_dotclk_freq; in intel_dp_mode_valid()
H A Dintel_display.c2382 int clock_limit = display->cdclk.max_dotclk_freq; in intel_crtc_compute_pipe_mode()
2398 clock_limit = display->cdclk.max_cdclk_freq * 9 / 10; in intel_crtc_compute_pipe_mode()
2406 clock_limit = display->cdclk.max_dotclk_freq; in intel_crtc_compute_pipe_mode()
4142 cdclk_state->logical.cdclk); in hsw_ips_linetime_wm()
7829 int max_dotclock = display->cdclk.max_dotclk_freq; in max_dotclock()
H A Dintel_tv.c964 int max_dotclk = display->cdclk.max_dotclk_freq; in intel_tv_mode_valid()
H A Dintel_display_power_well.c999 intel_cdclk_clock_changed(&display->cdclk.hw, in gen9_disable_dc_states()
H A Dintel_dp_mst.c1470 int max_dotclk = display->cdclk.max_dotclk_freq; in mst_connector_mode_valid_ctx()
H A Dintel_fbc.c1550 if (crtc_state->pixel_rate >= cdclk_state->logical.cdclk * 95 / 100) { in intel_fbc_check_plane()
H A Dintel_display_power.c1348 intel_cdclk_dump_config(display, &display->cdclk.hw, "Current CDCLK"); in hsw_restore_lcpll()
/linux-6.15/drivers/clk/samsung/
H A Dclk-s5pv210-audss.c71 struct clk *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio; in s5pv210_audss_clk_probe() local
106 cdclk = devm_clk_get(&pdev->dev, "iiscdclk0"); in s5pv210_audss_clk_probe()
120 if (!IS_ERR(cdclk)) in s5pv210_audss_clk_probe()
121 mout_i2s_p[1] = __clk_get_name(cdclk); in s5pv210_audss_clk_probe()
H A Dclk-exynos-audss.c129 struct clk *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in; in exynos_audss_clk_probe() local
189 cdclk = devm_clk_get(dev, "cdclk"); in exynos_audss_clk_probe()
191 if (!IS_ERR(cdclk)) in exynos_audss_clk_probe()
192 mout_i2s_p[1] = __clk_get_name(cdclk); in exynos_audss_clk_probe()
/linux-6.15/Documentation/devicetree/bindings/clock/
H A Dsamsung,exynos-audss-clock.yaml52 - const: cdclk
79 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in", "cdclk";
/linux-6.15/arch/arm/boot/dts/samsung/
H A Ds3c64xx-pinctrl.dtsi334 i2s0_cdclk: i2s0-cdclk-pins {
346 i2s1_cdclk: i2s1-cdclk-pins {
360 i2s2_cdclk: i2s2-cdclk-pins {
/linux-6.15/drivers/gpu/drm/i915/
H A Di915_reg.h3261 #define DISPLAY_TO_PCODE_UPDATE_MASK(cdclk, num_pipes, voltage_level) \ argument
3262 ((DISPLAY_TO_PCODE_CDCLK(cdclk)) | \

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