Home
last modified time | relevance | path

Searched refs:cci (Results 1 – 25 of 79) sorted by relevance

1234

/linux-6.15/drivers/i2c/busses/
H A Di2c-qcom-cci.c116 struct cci *cci; member
138 struct cci *cci = dev; in cci_isr() argument
231 static int cci_reset(struct cci *cci) in cci_reset() argument
249 static int cci_init(struct cci *cci) in cci_init() argument
270 if (!cci->master[i].cci) in cci_init()
428 struct cci *cci = cci_master->cci; in cci_xfer() local
527 struct cci *cci; in cci_probe() local
563 master->cci = cci; in cci_probe()
629 if (!cci->master[i].cci) in cci_probe()
646 if (cci->master[i].cci) { in cci_probe()
[all …]
/linux-6.15/Documentation/devicetree/bindings/i2c/
H A Dqcom,i2c-cci.yaml17 - qcom,msm8226-cci
18 - qcom,msm8974-cci
19 - qcom,msm8996-cci
121 - const: cci
141 - const: cci
160 - const: cci
179 - const: cci
200 - const: cci
219 - const: cci
248 cci@ac4a000 {
[all …]
/linux-6.15/Documentation/devicetree/bindings/arm/
H A Darm,cci-400.yaml24 pattern: "^cci(@[0-9a-f]+)?$"
28 - arm,cci-400
29 - arm,cci-500
30 - arm,cci-550
48 const: arm,cci-400-ctrl-if
71 - const: arm,cci-400-pmu,r0
72 - const: arm,cci-400-pmu,r1
73 - const: arm,cci-400-pmu
77 - const: arm,cci-500-pmu,r0
78 - const: arm,cci-550-pmu,r0
[all …]
H A Dcci-control-port.yaml4 $id: http://devicetree.org/schemas/arm/cci-control-port.yaml#
19 cci-control-port:
33 cci-control-port = <&cci_control1>;
/linux-6.15/drivers/usb/typec/ucsi/
H A Dtrace.c36 const char *ucsi_cci_str(u32 cci) in ucsi_cci_str() argument
38 if (UCSI_CCI_CONNECTOR(cci)) { in ucsi_cci_str()
39 if (cci & UCSI_CCI_ACK_COMPLETE) in ucsi_cci_str()
41 if (cci & UCSI_CCI_COMMAND_COMPLETE) in ucsi_cci_str()
45 if (cci & UCSI_CCI_ACK_COMPLETE) in ucsi_cci_str()
47 if (cci & UCSI_CCI_COMMAND_COMPLETE) in ucsi_cci_str()
H A Dcros_ec_ucsi.c79 static int cros_ucsi_read_cci(struct ucsi *ucsi, u32 *cci) in cros_ucsi_read_cci() argument
81 return cros_ucsi_read(ucsi, UCSI_CCI, cci, sizeof(*cci)); in cros_ucsi_read_cci()
108 static int cros_ucsi_sync_control(struct ucsi *ucsi, u64 cmd, u32 *cci, in cros_ucsi_sync_control() argument
114 ret = ucsi_sync_control_common(ucsi, cmd, cci, data, size); in cros_ucsi_sync_control()
148 u32 cci; in cros_ucsi_work() local
150 if (cros_ucsi_read_cci(udata->ucsi, &cci)) in cros_ucsi_work()
153 ucsi_notify_common(udata->ucsi, cci); in cros_ucsi_work()
160 u32 cci; in cros_ucsi_write_timeout() local
163 if (cros_ucsi_read(udata->ucsi, UCSI_CCI, &cci, sizeof(cci))) { in cros_ucsi_write_timeout()
169 if (cci & UCSI_CCI_BUSY) { in cros_ucsi_write_timeout()
[all …]
H A Ducsi_acpi.c59 static int ucsi_acpi_read_cci(struct ucsi *ucsi, u32 *cci) in ucsi_acpi_read_cci() argument
63 memcpy(cci, ua->base + UCSI_CCI, sizeof(*cci)); in ucsi_acpi_read_cci()
68 static int ucsi_acpi_poll_cci(struct ucsi *ucsi, u32 *cci) in ucsi_acpi_poll_cci() argument
77 return ucsi_acpi_read_cci(ucsi, cci); in ucsi_acpi_poll_cci()
108 static int ucsi_gram_sync_control(struct ucsi *ucsi, u64 command, u32 *cci, in ucsi_gram_sync_control() argument
116 ret = ucsi_sync_control_common(ucsi, command, cci, val, len); in ucsi_gram_sync_control()
161 u32 cci; in ucsi_acpi_notify() local
164 ret = ua->ucsi->ops->read_cci(ua->ucsi, &cci); in ucsi_acpi_notify()
168 ucsi_notify_common(ua->ucsi, cci); in ucsi_acpi_notify()
H A Ducsi_yoga_c630.c35 static int yoga_c630_ucsi_read_cci(struct ucsi *ucsi, u32 *cci) in yoga_c630_ucsi_read_cci() argument
45 memcpy(cci, buf, sizeof(*cci)); in yoga_c630_ucsi_read_cci()
87 u32 cci; in yoga_c630_ucsi_notify() local
97 ret = uec->ucsi->ops->read_cci(uec->ucsi, &cci); in yoga_c630_ucsi_notify()
101 ucsi_notify_common(uec->ucsi, cci); in yoga_c630_ucsi_notify()
H A Ducsi.c42 if (cci & UCSI_CCI_BUSY) in ucsi_notify_common()
45 if (UCSI_CCI_CONNECTOR(cci)) in ucsi_notify_common()
84 if (!ret && cci) in ucsi_sync_control_common()
114 *cci = 0; in ucsi_run_command()
121 if (*cci & UCSI_CCI_BUSY) in ucsi_run_command()
131 else if (*cci & UCSI_CCI_ERROR) in ucsi_run_command()
150 u32 cci; in ucsi_read_error() local
207 u32 cci; in ucsi_send_command_common() local
234 if (cci & UCSI_CCI_ERROR) in ucsi_send_command_common()
1347 u32 cci; in ucsi_reset_ppm() local
[all …]
H A Ducsi_glink.c121 static int pmic_glink_ucsi_read_cci(struct ucsi *ucsi, u32 *cci) in pmic_glink_ucsi_read_cci() argument
123 return pmic_glink_ucsi_read(ucsi, UCSI_CCI, cci, sizeof(*cci)); in pmic_glink_ucsi_read_cci()
241 u32 cci; in pmic_glink_ucsi_notify() local
244 ret = pmic_glink_ucsi_read(ucsi->ucsi, UCSI_CCI, &cci, sizeof(cci)); in pmic_glink_ucsi_notify()
250 ucsi_notify_common(ucsi->ucsi, cci); in pmic_glink_ucsi_notify()
H A Ducsi_ccg.c197 __le32 cci; member
328 if (UCSI_CCI_LENGTH(cci)) { in ccg_op_region_update()
338 data->cci = cpu_to_le32(cci); in ccg_op_region_update()
339 if (UCSI_CCI_LENGTH(cci)) in ccg_op_region_update()
567 static int ucsi_ccg_read_cci(struct ucsi *ucsi, u32 *cci) in ucsi_ccg_read_cci() argument
572 *cci = uc->op_data.cci; in ucsi_ccg_read_cci()
599 uc->op_data.cci = 0; in ucsi_ccg_async_control()
676 u32 cci = 0; in ccg_irq_handler() local
688 ret = ccg_read(uc, reg, (void *)&cci, sizeof(cci)); in ccg_irq_handler()
696 ret = ccg_op_region_update(uc, cci); in ccg_irq_handler()
[all …]
H A Ducsi_stm32g0.c363 static int ucsi_stm32g0_read_cci(struct ucsi *ucsi, u32 *cci) in ucsi_stm32g0_read_cci() argument
365 return ucsi_stm32g0_read(ucsi, UCSI_CCI, cci, sizeof(*cci)); in ucsi_stm32g0_read_cci()
409 u32 cci; in ucsi_stm32g0_irq_handler() local
415 ret = ucsi_stm32g0_read(g0->ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_stm32g0_irq_handler()
419 ucsi_notify_common(g0->ucsi, cci); in ucsi_stm32g0_irq_handler()
H A Ducsi.h79 int (*read_cci)(struct ucsi *ucsi, u32 *cci);
80 int (*poll_cci)(struct ucsi *ucsi, u32 *cci);
82 int (*sync_control)(struct ucsi *ucsi, u64 command, u32 *cci,
538 void ucsi_notify_common(struct ucsi *ucsi, u32 cci);
539 int ucsi_sync_control_common(struct ucsi *ucsi, u64 command, u32 *cci,
/linux-6.15/drivers/media/i2c/
H A Dimx283.c549 struct regmap *cci; member
740 ret = cci_write(imx283->cci, IMX283_REG_TPG_PAT, in imx283_update_test_pattern()
745 return cci_write(imx283->cci, IMX283_REG_TPG_CTRL, in imx283_update_test_pattern()
833 cci_write(imx283->cci, IMX283_REG_HTRIMMING, in imx283_set_ctrl()
836 cci_write(imx283->cci, IMX283_REG_HTRIMMING, in imx283_set_ctrl()
993 cci_write(imx283->cci, IMX283_REG_STANDBY, in imx283_standby_cancel()
1065 cci_write(imx283->cci, IMX283_REG_MDSEL3, in imx283_start_streaming()
1067 cci_write(imx283->cci, IMX283_REG_MDSEL4, in imx283_start_streaming()
1111 cci_write(imx283->cci, IMX283_REG_HTRIMMING_END, in imx283_start_streaming()
1458 if (IS_ERR(imx283->cci)) { in imx283_probe()
[all …]
H A Dimx335.c202 struct regmap *cci; member
480 cci_write(imx335->cci, IMX335_REG_HOLD, 1, &ret); in imx335_update_exp_gain()
481 cci_write(imx335->cci, IMX335_REG_VMAX, lpfr, &ret); in imx335_update_exp_gain()
483 cci_write(imx335->cci, IMX335_REG_GAIN, gain, &ret); in imx335_update_exp_gain()
512 cci_write(imx335->cci, IMX335_REG_TPG, in imx335_update_test_pattern()
515 cci_multi_reg_write(imx335->cci, tpg_enable_regs, in imx335_update_test_pattern()
527 cci_multi_reg_write(imx335->cci, tpg_disable_regs, in imx335_update_test_pattern()
886 ret = cci_write(imx335->cci, IMX335_REG_LANEMODE, in imx335_start_streaming()
899 ret = cci_write(imx335->cci, IMX335_REG_MODE_SELECT, in imx335_start_streaming()
1281 imx335->cci = devm_cci_regmap_init_i2c(client, 16); in imx335_probe()
[all …]
H A Dov64a40.c2837 struct regmap *cci; member
2883 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL0, in ov64a40_program_geometry()
2885 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL2, in ov64a40_program_geometry()
2887 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL4, in ov64a40_program_geometry()
2889 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL6, in ov64a40_program_geometry()
2893 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL10, in ov64a40_program_geometry()
2897 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRL8, in ov64a40_program_geometry()
2899 cci_write(ov64a40->cci, OV64A40_REG_TIMING_CTRLA, in ov64a40_program_geometry()
2970 ret = cci_write(ov64a40->cci, OV64A40_REG_SMIA, in ov64a40_start_streaming()
3548 if (IS_ERR(ov64a40->cci)) { in ov64a40_probe()
[all …]
/linux-6.15/Documentation/devicetree/bindings/interconnect/
H A Dmediatek,cci.yaml4 $id: http://devicetree.org/schemas/interconnect/mediatek,cci.yaml#
21 - mediatek,mt8183-cci
22 - mediatek,mt8186-cci
35 - const: cci
66 cci: cci {
67 compatible = "mediatek,mt8183-cci";
70 clock-names = "cci", "intermediate";
75 cci_opp: opp-table-cci {
/linux-6.15/arch/arm/boot/dts/samsung/
H A Dexynos5420-cpus.dtsi63 cci-control-port = <&cci_control1>;
75 cci-control-port = <&cci_control1>;
87 cci-control-port = <&cci_control1>;
99 cci-control-port = <&cci_control1>;
111 cci-control-port = <&cci_control0>;
123 cci-control-port = <&cci_control0>;
135 cci-control-port = <&cci_control0>;
147 cci-control-port = <&cci_control0>;
H A Dexynos5422-cpus.dtsi62 cci-control-port = <&cci_control0>;
75 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
101 cci-control-port = <&cci_control0>;
114 cci-control-port = <&cci_control1>;
127 cci-control-port = <&cci_control1>;
140 cci-control-port = <&cci_control1>;
153 cci-control-port = <&cci_control1>;
H A Dexynos5260.dtsi67 cci-control-port = <&cci_control1>;
74 cci-control-port = <&cci_control1>;
81 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
95 cci-control-port = <&cci_control0>;
102 cci-control-port = <&cci_control0>;
355 cci: cci@10f00000 { label
356 compatible = "arm,cci-400";
363 compatible = "arm,cci-400-ctrl-if";
369 compatible = "arm,cci-400-ctrl-if";
/linux-6.15/Documentation/devicetree/bindings/cpufreq/
H A Dcpufreq-mediatek.txt23 - mediatek,cci:
24 Used to confirm the link status between cpufreq and mediatek cci. Because
25 cpufreq and mediatek cci could share the same regulator in some MediaTek SoCs.
27 property to make sure mediatek cci is ready.
28 For details of mediatek cci, please refer to
29 Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
/linux-6.15/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca15_a7.dts42 cci-control-port = <&cci_control1>;
52 cci-control-port = <&cci_control1>;
62 cci-control-port = <&cci_control2>;
72 cci-control-port = <&cci_control2>;
82 cci-control-port = <&cci_control2>;
161 cci@2c090000 {
162 compatible = "arm,cci-400";
169 compatible = "arm,cci-400-ctrl-if";
175 compatible = "arm,cci-400-ctrl-if";
181 compatible = "arm,cci-400-pmu,r0";
/linux-6.15/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi32 cci-control-port = <&cci_control2>;
40 cci-control-port = <&cci_control2>;
174 cci: cci@10390000 { label
175 compatible = "arm,cci-400";
182 compatible = "arm,cci-400-ctrl-if";
188 compatible = "arm,cci-400-ctrl-if";
194 compatible = "arm,cci-400-ctrl-if";
200 compatible = "arm,cci-400-pmu,r1";
/linux-6.15/arch/arm64/boot/dts/mediatek/
H A Dmt6795.dtsi55 cci-control-port = <&cci_control2>;
64 cci-control-port = <&cci_control2>;
79 cci-control-port = <&cci_control2>;
94 cci-control-port = <&cci_control2>;
109 cci-control-port = <&cci_control1>;
124 cci-control-port = <&cci_control1>;
139 cci-control-port = <&cci_control1>;
154 cci-control-port = <&cci_control1>;
489 cci: cci@10390000 { label
490 compatible = "arm,cci-400";
[all …]
/linux-6.15/arch/arm/boot/dts/allwinner/
H A Dsun9i-a80.dtsi70 cci-control-port = <&cci_control0>;
79 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
97 cci-control-port = <&cci_control0>;
106 cci-control-port = <&cci_control1>;
115 cci-control-port = <&cci_control1>;
124 cci-control-port = <&cci_control1>;
133 cci-control-port = <&cci_control1>;
551 cci: cci@1c90000 { label
552 compatible = "arm,cci-400";
[all …]

1234