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Searched refs:cacheline_size (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/tools/perf/util/
H A Dcacheline.h7 int __pure cacheline_size(void);
16 u64 size = cacheline_size(); in cl_address()
27 u64 size = cacheline_size(); in cl_offset()
H A Dcacheline.c17 int cacheline_size(void) in cacheline_size() function
H A Dsort.c3644 if (sd->entry == &sort_mem_dcacheline && cacheline_size() == 0) in sort_dimension__add()
3733 if (!cacheline_size() && !strncasecmp(tok, "dcacheline", strlen(tok))) in setup_sort_list()
/linux-6.15/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_topology.h105 uint32_t cacheline_size; member
H A Dkfd_topology.c342 cache->cacheline_size); in kfd_cache_show()
1628 pcache->cacheline_size = pcache_info[cache_type].cache_line_size; in fill_in_l1_pcache()
1712 pcache->cacheline_size = pcache_info[cache_type].cache_line_size; in fill_in_l2_l3_pcache()
H A Dkfd_crat.c1197 props->cacheline_size = cache->cache_line_size; in kfd_parse_subtype_cache()
/linux-6.15/drivers/gpu/drm/i915/display/
H A Di9xx_wm.c25 u8 cacheline_size; member
367 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
375 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
383 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
391 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
399 .cacheline_size = I915_FIFO_LINE_SIZE,
407 .cacheline_size = I915_FIFO_LINE_SIZE,
415 .cacheline_size = I915_FIFO_LINE_SIZE,
423 .cacheline_size = I830_FIFO_LINE_SIZE,
431 .cacheline_size = I830_FIFO_LINE_SIZE,
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/linux-6.15/drivers/scsi/
H A Dmyrb.h297 unsigned short cacheline_size; /* Bytes 104-105 */ member
H A Dmyrs.h413 enum myrs_cacheline_size cacheline_size; /* Byte 7 */ member
H A Dmyrs.c1575 if (ldev_info->cacheline_size) { in myrs_mode_sense()
1577 put_unaligned_be16(1 << ldev_info->cacheline_size, in myrs_mode_sense()
/linux-6.15/drivers/pci/
H A Dpci.c4393 u8 cacheline_size; in pci_set_cacheline_size() local
4400 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
4401 if (cacheline_size >= pci_cache_line_size && in pci_set_cacheline_size()
4402 (cacheline_size % pci_cache_line_size) == 0) in pci_set_cacheline_size()
4408 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
4409 if (cacheline_size == pci_cache_line_size) in pci_set_cacheline_size()
/linux-6.15/drivers/net/ethernet/broadcom/
H A Dtg3.c17156 int cacheline_size; in tg3_calc_dma_bndry() local
17162 cacheline_size = 1024; in tg3_calc_dma_bndry()
17164 cacheline_size = (int) byte * 4; in tg3_calc_dma_bndry()
17204 switch (cacheline_size) { in tg3_calc_dma_bndry()
17229 switch (cacheline_size) { in tg3_calc_dma_bndry()
17246 switch (cacheline_size) { in tg3_calc_dma_bndry()