Searched refs:cacheable (Results 1 – 17 of 17) sorted by relevance
| /linux-6.15/Documentation/userspace-api/ |
| H A D | dma-buf-heaps.rst | 17 - The ``system`` heap allocates virtually contiguous, cacheable, buffers. 19 - The ``cma`` heap allocates physically contiguous, cacheable,
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| /linux-6.15/Documentation/devicetree/bindings/pmem/ |
| H A D | pmem-region.txt | 6 a) Usable as main system memory (i.e. cacheable), and 25 (i.e cacheable).
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| /linux-6.15/Documentation/arch/x86/ |
| H A D | amd-memory-encryption.rst | 202 Bits[9:0] number of cacheable RMP segment definitions 203 Bit[10] indicates if the number of cacheable RMP segments 237 of cacheable RMP segments (CPUID 0x80000025_EBX[9:0]) if the number of cacheable
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| /linux-6.15/arch/arm/mm/ |
| H A D | proc-arm946.S | 361 mcr p15, 0, r0, c2, c0, 0 @ region 1,2 d-cacheable 362 mcr p15, 0, r0, c2, c0, 1 @ region 1,2 i-cacheable
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| H A D | proc-arm740.S | 109 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable
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| H A D | proc-arm940.S | 317 mcr p15, 0, r0, c2, c0, 0 @ Region 1&2 cacheable
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| H A D | Kconfig | 1025 PL310 treats a cacheable write transaction during a Clean & 1047 not automatically drain. This can cause normal, non-cacheable 1101 bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K || CPU_V7M) && !CPU_V7
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| /linux-6.15/Documentation/devicetree/bindings/cache/ |
| H A D | l2c2x0.yaml | 158 memory non-cacheable transactions" into "cacheable no allocate" (for reads)
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| /linux-6.15/Documentation/devicetree/bindings/remoteproc/ |
| H A D | xlnx,zynqmp-r5fss.yaml | 69 tightly coupled memories (TCM). System memory is cacheable, but the TCM 70 memory space is non-cacheable.
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| /linux-6.15/Documentation/devicetree/bindings/dma/ |
| H A D | snps,dma-spear1340.yaml | 152 bit 1 - DMA is bufferable, bit 2 - DMA is cacheable.
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| /linux-6.15/arch/sparc/mm/ |
| H A D | viking.S | 96 mov 0x10, %g2 ! set cacheable bit
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| /linux-6.15/drivers/infiniband/hw/mlx5/ |
| H A D | mr.c | 753 mr->mmkey.cacheable = true; in _mlx5_mr_cache_alloc() 1153 mr->mmkey.cacheable = true; in alloc_cacheable_mr() 2046 if (mr->mmkey.cacheable && !mlx5r_umr_revoke_mr(mr) && !cache_ent_find_and_store(dev, mr)) { in mlx5_revoke_mr()
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| H A D | mlx5_ib.h | 668 u8 cacheable : 1; member
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| /linux-6.15/Documentation/admin-guide/cifs/ |
| H A D | usage.rst | 654 check to see whether a file is cacheable. CIFS has no way 656 is cacheable (oplocked). Unfortunately, even if a file 657 is not oplocked, it could still be cacheable (ie cifs client
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| /linux-6.15/Documentation/arch/arm64/ |
| H A D | booting.rst | 54 not exceed 2 megabytes in size. Since the dtb will be mapped cacheable
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| /linux-6.15/Documentation/admin-guide/hw-vuln/ |
| H A D | l1tf.rst | 81 marked present, never point to cacheable physical memory space.
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| /linux-6.15/arch/arm64/ |
| H A D | Kconfig | 744 address for a cacheable mapping of a location is being 795 non-cacheable memory attributes. The workaround depends on a firmware
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