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Searched refs:block_sequence (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c700 struct block_sequence block_sequence[], in hwss_build_fast_sequence() argument
743 block_sequence[*num_steps].func = OPTC_PIPE_CONTROL_LOCK; in hwss_build_fast_sequence()
751 block_sequence[*num_steps].func = DMUB_SEND_DMCUB_CMD; in hwss_build_fast_sequence()
785 block_sequence[*num_steps].func = HUBP_UPDATE_PLANE_ADDR; in hwss_build_fast_sequence()
804 block_sequence[*num_steps].func = DPP_SETUP_DPP; in hwss_build_fast_sequence()
840 block_sequence[*num_steps].func = MPC_SET_OUTPUT_CSC; in hwss_build_fast_sequence()
847 block_sequence[*num_steps].func = MPC_SET_OCSC_DEFAULT; in hwss_build_fast_sequence()
860 block_sequence[*num_steps].func = OPTC_PIPE_CONTROL_LOCK; in hwss_build_fast_sequence()
899 struct block_sequence block_sequence[], in hwss_execute_sequence() argument
907 params = &(block_sequence[i].params); in hwss_execute_sequence()
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H A Ddc_state.c342 memset(state->block_sequence, 0, sizeof(state->block_sequence)); in dc_state_destruct()
H A Ddc.c3925 context->block_sequence, in commit_planes_for_stream_fast()
3931 context->block_sequence, in commit_planes_for_stream_fast()
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
H A Ddcn401_clk_mgr.c643 params = &clk_mgr401->block_sequence[i].params; in dcn401_execute_block_sequence()
645 switch (clk_mgr401->block_sequence[i].func) { in dcn401_execute_block_sequence()
763 struct dcn401_clk_mgr_block_sequence *block_sequence = clk_mgr401->block_sequence; in dcn401_build_update_bandwidth_clocks_sequence() local
872 block_sequence[num_steps].func = CLK_MGR401_INDICATE_DRR_STATUS; in dcn401_build_update_bandwidth_clocks_sequence()
1048 block_sequence[num_steps].func = CLK_MGR401_INDICATE_DRR_STATUS; in dcn401_build_update_bandwidth_clocks_sequence()
1077 struct dcn401_clk_mgr_block_sequence *block_sequence = clk_mgr401->block_sequence; in dcn401_build_update_display_clocks_sequence() local
1121 block_sequence[num_steps].func = CLK_MGR401_UPDATE_DTBCLK_DTO; in dcn401_build_update_display_clocks_sequence()
1153 block_sequence[num_steps].func = CLK_MGR401_UPDATE_DPPCLK_DTO; in dcn401_build_update_display_clocks_sequence()
1157 block_sequence[num_steps].func = CLK_MGR401_UPDATE_DENTIST; in dcn401_build_update_display_clocks_sequence()
1185 block_sequence[num_steps].func = CLK_MGR401_UPDATE_DENTIST; in dcn401_build_update_display_clocks_sequence()
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H A Ddcn401_clk_mgr.h104 struct dcn401_clk_mgr_block_sequence block_sequence[DCN401_CLK_MGR_MAX_SEQUENCE_SIZE]; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/
H A Dhw_sequencer.h200 struct block_sequence { struct
537 struct block_sequence block_sequence[],
543 struct block_sequence block_sequence[],
/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/
H A Dcore_types.h633 struct block_sequence block_sequence[100]; member