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/linux-6.15/drivers/gpio/
H A Dgpio-omap.c84 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) argument
112 bank->context.oe = omap_gpio_rmw(bank->base + bank->regs->direction, in omap_set_gpio_direction()
139 bank->context.dataout = omap_gpio_rmw(bank->base + bank->regs->dataout, in omap_set_gpio_dataout_mask()
150 bank->base + bank->regs->debounce_en); in omap_gpio_dbck_enable()
246 bank->base + bank->regs->debounce_en); in omap_clear_gpio_debounce()
870 reg = bank->base + bank->regs->datain; in omap_gpio_get()
872 reg = bank->base + bank->regs->dataout; in omap_gpio_get()
884 bank->set_dataout(bank, offset, value); in omap_gpio_output()
963 bank->set_dataout(bank, offset, value); in omap_gpio_set()
1020 bank->context.oe = readl_relaxed(bank->base + bank->regs->direction); in omap_gpio_mod_init()
[all …]
H A Dgpio-rockchip.c196 data = readl(bank->reg_base + bank->gpio_regs->ext_port); in rockchip_gpio_get()
214 if (bank->gpio_type == GPIO_TYPE_V2 && !IS_ERR(bank->db_clk)) { in rockchip_gpio_set_debounce()
345 dev_dbg(bank->dev, "got irq for bank %s\n", bank->name); in rockchip_irq_demux()
431 data = readl(bank->reg_base + bank->gpio_regs->ext_port); in rockchip_irq_set_type()
524 bank->domain = irq_domain_add_linear(bank->of_node, 32, in rockchip_interrupts_register()
538 bank->name); in rockchip_interrupts_register()
656 bank->reg_base = devm_ioremap_resource(bank->dev, &res); in rockchip_get_bank_data()
660 bank->irq = irq_of_parse_and_map(bank->of_node, 0); in rockchip_get_bank_data()
664 bank->clk = of_clk_get(bank->of_node, 0); in rockchip_get_bank_data()
677 bank->db_clk = of_clk_get(bank->of_node, 1); in rockchip_get_bank_data()
[all …]
H A Dgpio-brcmstb.c28 #define GIO_ODEN(bank) GIO_BANK_OFF(bank, GIO_REG_ODEN) argument
29 #define GIO_DATA(bank) GIO_BANK_OFF(bank, GIO_REG_DATA) argument
30 #define GIO_IODIR(bank) GIO_BANK_OFF(bank, GIO_REG_IODIR) argument
31 #define GIO_EC(bank) GIO_BANK_OFF(bank, GIO_REG_EC) argument
32 #define GIO_EI(bank) GIO_BANK_OFF(bank, GIO_REG_EI) argument
33 #define GIO_MASK(bank) GIO_BANK_OFF(bank, GIO_REG_MASK) argument
75 return bank->gc.read_reg(reg_base + GIO_STAT(bank->id)) & in __brcmstb_gpio_get_active_irqs()
76 bank->gc.read_reg(reg_base + GIO_MASK(bank->id)); in __brcmstb_gpio_get_active_irqs()
206 bank->gc.write_reg(priv->reg_base + GIO_EC(bank->id), in brcmstb_gpio_irq_set_type()
208 bank->gc.write_reg(priv->reg_base + GIO_EI(bank->id), in brcmstb_gpio_irq_set_type()
[all …]
/linux-6.15/drivers/pinctrl/samsung/
H A Dpinctrl-exynos.c62 reg_mask = bank->pctl_offset + bank->eint_mask_offset; in exynos_irq_mask()
91 reg_pend = bank->pctl_offset + bank->eint_pend_offset; in exynos_irq_ack()
127 reg_mask = bank->pctl_offset + bank->eint_mask_offset; in exynos_irq_unmask()
185 reg_con = bank->pctl_offset + bank->eint_con_offset; in exynos_irq_set_type()
407 bank->irq_chip->chip.name = bank->name; in exynos_eint_gpio_init()
410 bank->nr_pins, &exynos_eint_irqd_ops, bank); in exynos_eint_gpio_init()
430 for (--i, --bank; i >= 0; --i, --bank) { in exynos_eint_gpio_init()
597 struct samsung_pin_bank *bank = eintd->bank; in exynos_irq_eint0_15() local
699 bank->irq_chip->chip.name = bank->name; in exynos_eint_wkup_init()
702 bank->nr_pins, &exynos_eint_irqd_ops, bank); in exynos_eint_wkup_init()
[all …]
H A Dpinctrl-samsung.c368 if (bank) in pin_to_reg_bank()
563 reg = bank->pctl_base + bank->pctl_offset; in samsung_gpio_set_value()
601 reg = bank->pctl_base + bank->pctl_offset; in samsung_gpio_get()
635 reg = bank->pctl_base + bank->pctl_offset in samsung_gpio_set_direction()
724 bank->grange.name = bank->name; in samsung_add_pin_ranges()
725 bank->grange.id = bank->id; in samsung_add_pin_ranges()
726 bank->grange.pin_base = bank->pin_base; in samsung_add_pin_ranges()
728 bank->grange.npins = bank->nr_pins; in samsung_add_pin_ranges()
729 bank->grange.gc = &bank->gpio_chip; in samsung_add_pin_ranges()
953 for (bank = 0; bank < drvdata->nr_banks; bank++) { in samsung_pinctrl_register()
[all …]
H A Dpinctrl-s3c64xx.c476 bank = d->pin_banks; in s3c64xx_eint_gpio_init()
484 mask = bank->eint_mask; in s3c64xx_eint_gpio_init()
487 bank->irq_domain = irq_domain_create_linear(bank->fwnode, in s3c64xx_eint_gpio_init()
503 bank = d->pin_banks; in s3c64xx_eint_gpio_init()
560 struct samsung_pin_bank *bank = ddata->bank; in s3c64xx_eint0_irq_set_type() local
668 struct samsung_pin_bank *bank = ddata->bank; in s3c64xx_eint0_irq_map() local
739 bank = d->pin_banks; in s3c64xx_eint_eint0_init()
750 mask = bank->eint_mask; in s3c64xx_eint_eint0_init()
757 ddata->bank = bank; in s3c64xx_eint_eint0_init()
759 bank->irq_domain = irq_domain_create_linear(bank->fwnode, in s3c64xx_eint_eint0_init()
[all …]
/linux-6.15/drivers/crypto/intel/qat/qat_common/
H A Dadf_gen4_hw_csr_data.h39 ADF_RING_BUNDLE_SIZE * (bank) + \
43 ADF_RING_BUNDLE_SIZE * (bank) + \
74 ADF_RING_BUNDLE_SIZE * (bank) + \
78 ADF_RING_BUNDLE_SIZE * (bank) + \
82 ADF_RING_BUNDLE_SIZE * (bank) + \
87 u32 _bank = bank; \
122 ADF_RING_BUNDLE_SIZE * (bank) + \
126 ADF_RING_BUNDLE_SIZE * (bank) + \
133 ADF_RING_BUNDLE_SIZE * (bank) + \
140 ADF_RING_BUNDLE_SIZE * (bank) + \
[all …]
H A Dadf_gen4_hw_csr_data.c35 return READ_CSR_STAT(csr_base_addr, bank); in read_csr_stat()
40 return READ_CSR_UO_STAT(csr_base_addr, bank); in read_csr_uo_stat()
45 return READ_CSR_E_STAT(csr_base_addr, bank); in read_csr_e_stat()
50 return READ_CSR_NE_STAT(csr_base_addr, bank); in read_csr_ne_stat()
55 return READ_CSR_NF_STAT(csr_base_addr, bank); in read_csr_nf_stat()
60 return READ_CSR_F_STAT(csr_base_addr, bank); in read_csr_f_stat()
65 return READ_CSR_C_STAT(csr_base_addr, bank); in read_csr_c_stat()
70 return READ_CSR_EXP_STAT(csr_base_addr, bank); in read_csr_exp_stat()
110 return READ_CSR_INT_EN(csr_base_addr, bank); in read_csr_int_en()
115 WRITE_CSR_INT_EN(csr_base_addr, bank, value); in write_csr_int_en()
[all …]
H A Dadf_transport.c66 csr_ops->write_csr_int_col_en(bank->csr_addr, bank->bank_number, in adf_enable_ring_irq()
68 csr_ops->write_csr_int_col_ctl(bank->csr_addr, bank->bank_number, in adf_enable_ring_irq()
79 csr_ops->write_csr_int_col_en(bank->csr_addr, bank->bank_number, in adf_disable_ring_irq()
162 struct adf_etr_bank_data *bank = ring->bank; in adf_init_ring() local
269 ring->bank = bank; in adf_create_ring()
306 struct adf_etr_bank_data *bank = ring->bank; in adf_remove_ring() local
314 csr_ops->write_csr_ring_config(bank->csr_addr, bank->bank_number, in adf_remove_ring()
316 csr_ops->write_csr_ring_base(bank->csr_addr, bank->bank_number, in adf_remove_ring()
398 memset(bank, 0, sizeof(*bank)); in adf_init_bank()
408 if (!bank->rings) in adf_init_bank()
[all …]
H A Dadf_gen2_hw_csr_data.h30 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
31 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
33 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
34 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
36 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument
37 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
40 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
59 #define WRITE_CSR_INT_FLAG(csr_base_addr, bank, value) \ argument
62 #define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \ argument
69 #define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \ argument
[all …]
H A Dadf_gen2_hw_csr_data.c13 return READ_CSR_RING_HEAD(csr_base_addr, bank, ring); in read_csr_ring_head()
19 WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value); in write_csr_ring_head()
24 return READ_CSR_RING_TAIL(csr_base_addr, bank, ring); in read_csr_ring_tail()
30 WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value); in write_csr_ring_tail()
35 return READ_CSR_E_STAT(csr_base_addr, bank); in read_csr_e_stat()
47 WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, addr); in write_csr_ring_base()
52 WRITE_CSR_INT_FLAG(csr_base_addr, bank, value); in write_csr_int_flag()
57 WRITE_CSR_INT_SRCSEL(csr_base_addr, bank); in write_csr_int_srcsel()
63 WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value); in write_csr_int_col_en()
69 WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value); in write_csr_int_col_ctl()
[all …]
H A Dadf_transport_debug.c44 struct adf_etr_bank_data *bank = ring->bank; in adf_ring_show() local
46 void __iomem *csr = ring->bank->csr_addr; in adf_ring_show()
61 ring->ring_number, ring->bank->bank_number); in adf_ring_show()
104 ring->bank->bank_debug_dir, in adf_ring_debugfs_add()
121 struct adf_etr_bank_data *bank = sfile->private; in adf_bank_start() local
152 bank->bank_number); in adf_bank_show()
156 void __iomem *csr = bank->csr_addr; in adf_bank_show()
159 if (!(bank->ring_mask & 1 << ring_id)) in adf_bank_show()
200 bank->bank_debug_dir, bank, in adf_bank_debugfs_add()
207 debugfs_remove(bank->bank_debug_cfg); in adf_bank_debugfs_rm()
[all …]
/linux-6.15/drivers/pinctrl/renesas/
H A Dsh_pfc.h443 fn(bank, pin, GP_##bank##_##pin, sfx, cfg)
594 PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx), \
595 PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx), \
596 PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx), \
597 PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx), \
598 PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx), \
599 PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx), \
600 PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx), \
601 PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx), \
609 PORT_GP_1(bank, 1, fn, sfx), PORT_GP_1(bank, 0, fn, sfx)
[all …]
/linux-6.15/arch/x86/kernel/cpu/mce/
H A Damd.c583 b.bank = bank; in prepare_threshold_block()
689 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) { in mce_amd_feature_init()
798 m->bank = bank; in __log_error()
853 if (!_log_error_bank(bank, mca_msr_reg(bank, MCA_STATUS), in _log_error_deferred()
887 _log_error_bank(bank, MSR_AMD64_SMCA_MCx_DESTAT(bank), in log_error_deferred()
896 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) in amd_deferred_error_interrupt()
946 for (bank = 0; bank < this_cpu_read(mce_num_banks); ++bank) { in amd_threshold_interrupt()
1164 b->bank = bank; in allocate_threshold_blocks()
1276 kfree(bank); in threshold_remove_bank()
1283 for (bank = 0; bank < numbanks; bank++) { in __threshold_remove_device()
[all …]
H A Dthreshold.c35 void mce_inherit_storm(unsigned int bank) in mce_inherit_storm() argument
46 storm->banks[bank].history = ~0ull; in mce_inherit_storm()
47 storm->banks[bank].timestamp = jiffies; in mce_inherit_storm()
64 mce_intel_handle_storm(bank, on); in mce_handle_storm()
69 void cmci_storm_begin(unsigned int bank) in cmci_storm_begin() argument
84 void cmci_storm_end(unsigned int bank) in cmci_storm_end() argument
89 storm->banks[bank].history = 0; in cmci_storm_end()
137 mce_handle_storm(mce->bank, false); in mce_track_storm()
138 cmci_storm_end(mce->bank); in mce_track_storm()
143 mce_handle_storm(mce->bank, true); in mce_track_storm()
[all …]
H A Dintel.c144 rdmsrl(MSR_IA32_MCx_CTL2(bank), val); in cmci_set_threshold()
155 cmci_set_threshold(bank, cmci_threshold[bank]); in mce_intel_handle_storm()
180 if (test_bit(bank, owned)) in cmci_skip_bank()
191 clear_bit(bank, owned); in cmci_skip_bank()
250 mce_inherit_storm(bank); in cmci_claim_bank()
251 cmci_storm_begin(bank); in cmci_claim_bank()
267 if (cmci_threshold[bank] == 0) in cmci_claim_bank()
333 cmci_storm_end(bank); in __cmci_disable_bank()
384 void cmci_disable_bank(int bank) in cmci_disable_bank() argument
393 __cmci_disable_bank(bank); in cmci_disable_bank()
[all …]
/linux-6.15/drivers/pinctrl/stm32/
H A Dpinctrl-stm32.c254 fwspec.fwnode = bank->fwnode; in stm32_gpio_to_irq()
292 if (bank->secure_control) { in stm32_gpio_init_valid_mask()
486 bank); in stm32_gpio_domain_alloc()
1302 if (!IS_ERR(bank->rstc)) in stm32_gpiolib_register_bank()
1309 if (IS_ERR(bank->base)) in stm32_gpiolib_register_bank()
1340 bank->gpio_chip.base = -1; in stm32_gpiolib_register_bank()
1345 bank->bank_nr = bank_nr; in stm32_gpiolib_register_bank()
1352 bank->fwnode = fwnode; in stm32_gpiolib_register_bank()
1356 bank); in stm32_gpiolib_register_bank()
1358 if (!bank->domain) in stm32_gpiolib_register_bank()
[all …]
/linux-6.15/drivers/net/phy/mscc/
H A Dmscc_macsec.c36 if (bank >> 2 == 0x1) in vsc8584_macsec_phy_read()
38 bank &= 0x3; in vsc8584_macsec_phy_read()
40 bank = 0; in vsc8584_macsec_phy_read()
74 if ((bank >> 2 == 0x1) || (bank >> 2 == 0x3)) in vsc8584_macsec_phy_write()
75 bank &= 0x3; in vsc8584_macsec_phy_write()
78 bank = 0; in vsc8584_macsec_phy_write()
374 enum macsec_bank bank = flow->bank; in vsc8584_macsec_flow() local
464 enum macsec_bank bank = flow->bank; in vsc8584_macsec_flow_enable() local
483 enum macsec_bank bank = flow->bank; in vsc8584_macsec_flow_disable() local
524 enum macsec_bank bank = flow->bank; in vsc8584_macsec_transformation() local
[all …]
/linux-6.15/tools/testing/selftests/gpio/
H A Dgpio-sim.sh182 create_bank chip bank
190 create_bank chip bank
197 create_bank chip bank
207 create_bank chip bank
215 create_bank chip bank
224 create_bank chip bank
233 create_bank chip bank
241 create_bank chip bank
253 create_bank chip bank
264 create_bank chip bank
[all …]
/linux-6.15/drivers/bus/
H A Duniphier-system-bus.c45 bank, addr, paddr, size); in uniphier_system_bus_add_bank()
47 if (bank >= ARRAY_SIZE(priv->bank)) { in uniphier_system_bus_add_bank()
52 if (priv->bank[bank].base || priv->bank[bank].end) { in uniphier_system_bus_add_bank()
86 priv->bank[bank].base = paddr; in uniphier_system_bus_add_bank()
87 priv->bank[bank].end = end; in uniphier_system_bus_add_bank()
90 bank, priv->bank[bank].base, priv->bank[bank].end); in uniphier_system_bus_add_bank()
102 if (priv->bank[i].end > priv->bank[j].base && in uniphier_system_bus_check_overlap()
103 priv->bank[i].base < priv->bank[j].end) { in uniphier_system_bus_check_overlap()
130 swap(priv->bank[0], priv->bank[1]); in uniphier_system_bus_check_boot_swap()
141 base = priv->bank[i].base; in uniphier_system_bus_set_reg()
[all …]
/linux-6.15/arch/arm64/boot/dts/exynos/
H A Dexynos9810-pinctrl.dtsi12 etc1: etc1-gpio-bank {
20 gpa0: gpa0-gpio-bank {
37 gpa1: gpa1-gpio-bank {
54 gpa2: gpa2-gpio-bank {
71 gpa3: gpa3-gpio-bank {
88 gpa4: gpa4-gpio-bank {
96 gpq0: gpq0-gpio-bank {
106 gpb0: gpb0-gpio-bank {
114 gpb1: gpb1-gpio-bank {
122 gpb2: gpb2-gpio-bank {
[all …]
/linux-6.15/drivers/pinctrl/meson/
H A Dpinctrl-amlogic-a4.c137 if (!bank->reg_mux) in aml_pctl_set_function()
264 if (!bank->reg_ds) in aml_pinconf_get_drive_strength()
420 if (!bank->reg_ds) { in aml_pinconf_set_drive_strength()
888 bank->reg_mux = aml_map_resource(dev, bank->bank_id, np, "mux"); in aml_gpiolib_register_bank()
898 bank->reg_gpio = aml_map_resource(dev, bank->bank_id, np, "gpio"); in aml_gpiolib_register_bank()
903 bank->reg_ds = aml_map_resource(dev, bank->bank_id, np, "ds"); in aml_gpiolib_register_bank()
906 bank->reg_ds = bank->reg_gpio; in aml_gpiolib_register_bank()
916 bank->gpio_chip.label = aml_bank_name[bank->bank_id]; in aml_gpiolib_register_bank()
918 bank->pin_base = bank->bank_id << 8; in aml_gpiolib_register_bank()
961 bank = 0; in aml_pctl_probe_dt()
[all …]
/linux-6.15/drivers/pinctrl/
H A Dpinctrl-rockchip.c1958 if ((bank->bank_num == 0) || (bank->bank_num == 1)) { in rk3399_calc_pull_reg_and_bit()
1991 if ((bank->bank_num == 0) || (bank->bank_num == 1)) in rk3399_calc_drv_reg_and_bit()
3168 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base, in rockchip_pmx_set()
3178 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); in rockchip_pmx_set()
3296 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3311 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3317 rc = rockchip_set_mux(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3328 rc = rockchip_set_mux(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3396 rc = rockchip_get_mux(bank, pin - bank->pin_base); in rockchip_pinconf_get()
3426 rc = rockchip_get_schmitt(bank, pin - bank->pin_base); in rockchip_pinconf_get()
[all …]
/linux-6.15/drivers/leds/
H A Dleds-tca6507.c159 struct bank { struct
164 } bank[3]; member
282 if (bank) { in set_code()
306 tca->bank[bank].level = level; in set_level()
315 result = choose_times(tca->bank[bank].ontime, &c1, &c2); in set_times()
321 c2, time_codes[c2], tca->bank[bank].ontime); in set_times()
324 tca->bank[bank].ontime = result; in set_times()
326 result = choose_times(tca->bank[bank].offtime, &c1, &c2); in set_times()
330 c2, time_codes[c2], tca->bank[bank].offtime); in set_times()
334 tca->bank[bank].offtime = result; in set_times()
[all …]
/linux-6.15/sound/pci/au88x0/
H A Dau88x0_wt.h21 #define WT_CTRL(bank) (((((bank)&1)<<0xd) + 0x00)<<2) /* 0x0000 */ argument
22 #define WT_SRAMP(bank) (((((bank)&1)<<0xd) + 0x01)<<2) /* 0x0004 */ argument
23 #define WT_DSREG(bank) (((((bank)&1)<<0xd) + 0x02)<<2) /* 0x0008 */ argument
24 #define WT_MRAMP(bank) (((((bank)&1)<<0xd) + 0x03)<<2) /* 0x000c */ argument
25 #define WT_GMODE(bank) (((((bank)&1)<<0xd) + 0x04)<<2) /* 0x0010 */ argument
26 #define WT_ARAMP(bank) (((((bank)&1)<<0xd) + 0x05)<<2) /* 0x0014 */ argument

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