Searched refs:axi_clkgen (Results 1 – 2 of 2) sorted by relevance
57 struct axi_clkgen { struct232 static void axi_clkgen_write(struct axi_clkgen *axi_clkgen, in axi_clkgen_write() argument238 static void axi_clkgen_read(struct axi_clkgen *axi_clkgen, in axi_clkgen_read() argument259 static int axi_clkgen_mmcm_read(struct axi_clkgen *axi_clkgen, in axi_clkgen_mmcm_read() argument283 static int axi_clkgen_mmcm_write(struct axi_clkgen *axi_clkgen, in axi_clkgen_mmcm_write() argument321 static void axi_clkgen_set_div(struct axi_clkgen *axi_clkgen, in axi_clkgen_set_div() argument340 struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw); in axi_clkgen_set_rate() local391 struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(hw); in axi_clkgen_determine_rate() local439 struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw); in axi_clkgen_recalc_rate() local466 struct axi_clkgen *axi_clkgen = clk_hw_to_axi_clkgen(clk_hw); in axi_clkgen_enable() local[all …]
14 The axi_clkgen IP core is a software programmable clock generator,17 Link: https://wiki.analog.com/resources/fpga/docs/axi_clkgen