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/linux-6.15/arch/arm64/boot/dts/freescale/
H A Dimx8mp-nominal.dtsi7 assigned-clocks = <&clk IMX8MP_CLK_A53_SRC>,
19 assigned-clock-rates = <0>, <0>,
28 assigned-clocks = <&clk IMX8MP_CLK_GPU2D_CORE>;
30 assigned-clock-rates = <800000000>;
34 assigned-clocks = <&clk IMX8MP_CLK_GPU3D_CORE>,
42 assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>,
50 assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>;
52 assigned-clock-rates = <400000000>;
56 assigned-clocks = <&clk IMX8MP_CLK_GPU_AXI>,
64 assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>,
[all …]
H A Dimx8mm-overdrive.dtsi4 assigned-clocks = <&clk IMX8MM_CLK_GPU2D_CORE>,
6 assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>;
7 assigned-clock-rates = <0>, <1000000000>;
11 assigned-clocks = <&clk IMX8MM_CLK_GPU3D_CORE>,
13 assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>;
14 assigned-clock-rates = <0>, <1000000000>;
18 assigned-clocks = <&clk IMX8MM_CLK_VPU_G1>,
22 assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
25 assigned-clock-rates = <750000000>,
H A Dimx8-ss-dma.dtsi35 assigned-clock-rates = <60000000>;
53 assigned-clock-rates = <60000000>;
71 assigned-clock-rates = <60000000>;
89 assigned-clock-rates = <60000000>;
103 assigned-clock-rates = <80000000>;
117 assigned-clock-rates = <80000000>;
131 assigned-clock-rates = <80000000>;
145 assigned-clock-rates = <80000000>;
160 assigned-clock-rates = <24000000>;
321 assigned-clock-rates = <24000000>;
[all …]
H A Dimx8mn-evk.dtsi310 assigned-clock-rates = <24000000>;
334 assigned-clocks = <&clk IMX8MN_CLK_PDM>;
336 assigned-clock-rates = <196608000>;
377 assigned-clocks = <&clk IMX8MN_CLK_SAI2>;
379 assigned-clock-rates = <24576000>;
386 assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
388 assigned-clock-rates = <24576000>;
402 assigned-clock-rates = <24576000>;
409 assigned-clocks = <&clk IMX8MN_CLK_UART1>;
454 assigned-clock-rates = <200000000>;
[all …]
H A Dimx8mq-mnt-reform2.dts105 assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>;
106 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>;
107 assigned-clock-rates = <25000000>;
175 assigned-clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL>;
176 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>;
177 /delete-property/assigned-clock-rates;
235 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
236 assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
237 assigned-clock-rates = <25000000>;
274 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
[all …]
H A Dimx8mp.dtsi765 assigned-clock-rates = <0>, <0>,
1050 assigned-clock-rates = <80000000>;
1067 assigned-clock-rates = <80000000>;
1084 assigned-clock-rates = <80000000>;
1137 assigned-clock-rates = <40000000>;
1152 assigned-clock-rates = <40000000>;
1328 assigned-clock-rates = <80000000>;
2173 assigned-clock-rates = <10000000>;
2214 assigned-clock-rates = <10000000>;
2269 assigned-clock-rates = <600000000>;
[all …]
H A Dimx8ulp.dtsi303 assigned-clocks = <&pcc3 IMX8ULP_CLK_WDOG3>;
370 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C4>;
372 assigned-clock-rates = <48000000>;
383 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C5>;
385 assigned-clock-rates = <48000000>;
416 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI4>;
418 assigned-clock-rates = <48000000>;
431 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI5>;
433 assigned-clock-rates = <48000000>;
476 assigned-clock-rates = <48000000>;
[all …]
/linux-6.15/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra-audio-graph-card.yaml35 assigned-clocks:
39 assigned-clock-parents:
43 assigned-clock-rates:
63 - assigned-clocks
64 - assigned-clock-parents
79 assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
83 assigned-clock-rates = <368640000>, <49152000>, <12288000>;
101 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
102 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
171 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
[all …]
H A Dbrcm,cygnus-audio.txt13 - assigned-clocks: PLL and leaf clocks
14 - assigned-clock-parents: parent clocks of the assigned clocks
16 - assigned-clock-rates: List of clock frequencies of the
17 assigned clocks
36 assigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>,
40 assigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>;
41 assigned-clock-rates = <1769470191>,
H A Dnvidia,tegra210-ahub.yaml43 assigned-clocks:
46 assigned-clock-parents:
49 assigned-clock-rates:
122 - assigned-clocks
123 - assigned-clock-parents
139 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
140 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
176 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
178 assigned-clock-rates = <1536000>;
187 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
[all …]
H A Dnvidia,tegra210-dmic.yaml45 assigned-clocks:
48 assigned-clock-parents:
51 assigned-clock-rates:
79 - assigned-clocks
80 - assigned-clock-parents
93 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
94 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
95 assigned-clock-rates = <3072000>;
H A Dnvidia,tegra186-dspk.yaml45 assigned-clocks:
48 assigned-clock-parents:
51 assigned-clock-rates:
79 - assigned-clocks
80 - assigned-clock-parents
94 assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
95 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
96 assigned-clock-rates = <12288000>;
H A Dnvidia,tegra210-i2s.yaml58 assigned-clocks:
62 assigned-clock-parents:
66 assigned-clock-rates:
95 - assigned-clocks
96 - assigned-clock-parents
109 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
110 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
111 assigned-clock-rates = <1536000>;
/linux-6.15/Documentation/devicetree/bindings/phy/
H A Dti,phy-j721e-wiz.yaml95 assigned-clocks:
98 assigned-clock-parents:
104 - assigned-clocks
105 - assigned-clock-parents
131 assigned-clocks:
134 assigned-clock-parents:
140 - assigned-clocks
141 - assigned-clock-parents
219 assigned-clocks = <&wiz1_pll0_refclk>;
226 assigned-clocks = <&wiz1_pll1_refclk>;
[all …]
H A Dmixel,mipi-dsi-phy.yaml65 - assigned-clocks
66 - assigned-clock-parents
67 - assigned-clock-rates
76 assigned-clocks: false
77 assigned-clock-parents: false
78 assigned-clock-rates: false
93 assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>;
94 assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>;
95 assigned-clock-rates = <24000000>;
/linux-6.15/arch/arm/boot/dts/nxp/imx/
H A Dimx7ulp.dtsi154 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART4>;
156 assigned-clock-rates = <24000000>;
166 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART5>;
168 assigned-clock-rates = <48000000>;
175 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
263 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
287 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM5>;
338 assigned-clock-rates = <48000000>;
351 assigned-clock-rates = <48000000>;
363 assigned-clock-rates = <48000000>;
[all …]
/linux-6.15/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-clk-ccf.dtsi170 assigned-clocks = <&zynqmp_clk GEM_TSU>;
177 assigned-clocks = <&zynqmp_clk GEM_TSU>;
184 assigned-clocks = <&zynqmp_clk GEM_TSU>;
191 assigned-clocks = <&zynqmp_clk GEM_TSU>;
220 assigned-clocks = <&zynqmp_clk SDIO0_REF>;
225 assigned-clocks = <&zynqmp_clk SDIO1_REF>;
254 assigned-clocks = <&zynqmp_clk UART0_REF>;
259 assigned-clocks = <&zynqmp_clk UART1_REF>;
264 assigned-clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
294 assigned-clocks = <&zynqmp_clk DPDMA_REF>; /* apll */
[all …]
/linux-6.15/arch/arm64/boot/dts/ti/
H A Dk3-j784s4-j742s2-main-common.dtsi125 assigned-clocks = <&k3_clks 157 34>;
280 assigned-clocks = <&k3_clks 97 2>;
292 assigned-clocks = <&k3_clks 98 2>;
304 assigned-clocks = <&k3_clks 99 2>;
316 assigned-clocks = <&k3_clks 100 2>;
328 assigned-clocks = <&k3_clks 101 2>;
340 assigned-clocks = <&k3_clks 102 2>;
352 assigned-clocks = <&k3_clks 103 2>;
364 assigned-clocks = <&k3_clks 104 2>;
376 assigned-clocks = <&k3_clks 105 2>;
[all …]
H A Dk3-j784s4-j742s2-mcu-wakeup-common.dtsi172 assigned-clocks = <&k3_clks 35 2>;
187 assigned-clocks = <&k3_clks 117 2>;
201 assigned-clocks = <&k3_clks 118 2>;
215 assigned-clocks = <&k3_clks 119 2>;
229 assigned-clocks = <&k3_clks 120 2>;
243 assigned-clocks = <&k3_clks 121 2>;
257 assigned-clocks = <&k3_clks 122 2>;
271 assigned-clocks = <&k3_clks 123 2>;
285 assigned-clocks = <&k3_clks 124 2>;
645 assigned-clocks = <&k3_clks 0 2>;
[all …]
H A Dk3-j721s2-mcu-wakeup.dtsi173 assigned-clocks = <&k3_clks 35 1>;
188 assigned-clocks = <&k3_clks 83 1>;
202 assigned-clocks = <&k3_clks 84 1>;
216 assigned-clocks = <&k3_clks 85 1>;
230 assigned-clocks = <&k3_clks 86 1>;
244 assigned-clocks = <&k3_clks 87 1>;
258 assigned-clocks = <&k3_clks 88 1>;
272 assigned-clocks = <&k3_clks 89 1>;
286 assigned-clocks = <&k3_clks 90 1>;
300 assigned-clocks = <&k3_clks 91 1>;
[all …]
/linux-6.15/arch/arm/boot/dts/samsung/
H A Dexynos4412-odroid-common.dtsi129 assigned-clocks = <&clock CLK_FOUT_EPLL>;
130 assigned-clock-rates = <45158401>;
143 assigned-clock-rates = <0>, <0>,
211 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
214 assigned-clock-rates = <0>, <176000000>;
219 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
222 assigned-clock-rates = <0>, <176000000>;
227 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
230 assigned-clock-rates = <0>, <176000000>;
235 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
[all …]
/linux-6.15/Documentation/devicetree/bindings/ufs/
H A Dti,j721e-ufs.yaml28 assigned-clocks:
31 assigned-clock-parents:
71 assigned-clocks = <&k3_clks 277 1>;
72 assigned-clock-parents = <&k3_clks 277 4>;
85 assigned-clocks = <&k3_clks 277 1>;
86 assigned-clock-parents = <&k3_clks 277 4>;
/linux-6.15/Documentation/devicetree/bindings/iio/adc/
H A Dnxp,imx8qxp-adc.yaml33 assigned-clocks:
36 assigned-clock-rates:
57 - assigned-clocks
58 - assigned-clock-rates
78 assigned-clocks = <&clk IMX_SC_R_ADC_0>;
79 assigned-clock-rates = <24000000>;
/linux-6.15/arch/mips/boot/dts/img/
H A Dpistachio.dtsi53 assigned-clock-rates = <100000000>, <33333334>;
71 assigned-clock-rates = <100000000>, <33333334>;
141 assigned-clocks = <&clk_core CLK_I2S_DIV>;
142 assigned-clock-rates = <12288000>;
162 assigned-clock-rates = <12288000>;
178 assigned-clocks = <&clk_core CLK_SPDIF_DIV>;
179 assigned-clock-rates = <12288000>;
752 assigned-clock-rates = <4000000>, <32768>;
763 assigned-clock-rates = <4000000>, <32768>;
789 assigned-clock-rates = <0>, <50000000>;
[all …]
/linux-6.15/arch/arm64/boot/dts/rockchip/
H A Drk3568-fastrhino-r68s.dts30 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
31 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
32 assigned-clock-rates = <0>, <125000000>;
46 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
47 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
48 assigned-clock-rates = <0>, <125000000>;

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