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Searched refs:arm_smmu_cb_write (Results 1 – 5 of 5) sorted by relevance

/linux-6.15/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-qcom-debug.c155 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, sctlr); in qcom_tbu_halt()
156 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSR, fsr); in qcom_tbu_halt()
158 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, sctlr_orig); in qcom_tbu_halt()
298 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, sctlr); in qcom_iova_to_phys()
303 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSR, fsr); in qcom_iova_to_phys()
310 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_RESUME, in qcom_iova_to_phys()
325 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSR, fsr); in qcom_iova_to_phys()
328 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_RESUME, in qcom_iova_to_phys()
408 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSR, cfi.fsr); in qcom_smmu_context_fault()
457 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSR, cfi.fsr); in qcom_smmu_context_fault()
[all …]
H A Darm-smmu.c265 arm_smmu_cb_write(smmu_domain->smmu, smmu_domain->cfg.cbndx, in arm_smmu_tlb_inv_context_s1()
296 arm_smmu_cb_write(smmu, idx, reg, iova); in arm_smmu_tlb_inv_range_s1()
324 arm_smmu_cb_write(smmu, idx, reg, iova); in arm_smmu_tlb_inv_range_s2()
476 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSR, cfi.fsr); in arm_smmu_context_fault()
579 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, 0); in arm_smmu_write_context_bank()
624 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TCR2, cb->tcr[1]); in arm_smmu_write_context_bank()
625 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TCR, cb->tcr[0]); in arm_smmu_write_context_bank()
630 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TTBR0, cb->ttbr[0]); in arm_smmu_write_context_bank()
631 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TTBR1, cb->ttbr[1]); in arm_smmu_write_context_bank()
656 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, reg); in arm_smmu_write_context_bank()
[all …]
H A Darm-smmu-qcom.c92 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, reg); in qcom_adreno_smmu_write_sctlr()
133 arm_smmu_cb_write(smmu, cfg->cbndx, ARM_SMMU_CB_RESUME, reg); in qcom_adreno_smmu_resume_translation()
154 arm_smmu_cb_write(smmu, cfg->cbndx, ARM_SMMU_CB_ACTLR, reg); in qcom_adreno_smmu_set_prr_bit()
296 arm_smmu_cb_write(smmu, cbndx, ARM_SMMU_CB_ACTLR, (unsigned long)match->data); in qcom_smmu_set_actlr_dev()
447 arm_smmu_cb_write(smmu, qsmmu->bypass_cbndx, ARM_SMMU_CB_SCTLR, 0); in qcom_smmu_cfg_probe()
H A Darm-smmu-impl.c138 arm_smmu_cb_write(smmu, i, ARM_SMMU_CB_ACTLR, reg); in arm_mmu500_reset()
H A Darm-smmu.h532 #define arm_smmu_cb_write(s, n, o, v) \ macro