Searched refs:amdgpu_vcn4_fw_shared (Results 1 – 5 of 5) sorted by relevance
139 struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_fw_shared_init()260 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_sw_fini()323 struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_hw_init()506 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared))); in vcn_v4_0_3_mc_resume()616 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared)), 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode()837 volatile struct amdgpu_vcn4_fw_shared *fw_shared = in vcn_v4_0_3_start_dpg_mode()994 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_start_sriov()1097 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared))); in vcn_v4_0_3_start_sriov()1169 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_start()1373 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_stop()
155 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_5_sw_init()249 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_5_sw_fini()448 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared))); in vcn_v4_0_5_mc_resume()559 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared)), 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode()914 volatile struct amdgpu_vcn4_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v4_0_5_start_dpg_mode()1045 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_5_start()1259 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_5_stop()
151 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_fw_shared_init()287 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_sw_fini()509 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared))); in vcn_v4_0_mc_resume()614 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared)), 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()1011 volatile struct amdgpu_vcn4_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v4_0_start_dpg_mode()1140 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_start()1352 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_start_sriov()1484 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared))); in vcn_v4_0_start_sriov()1599 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_stop()
450 struct amdgpu_vcn4_fw_shared { struct
206 fw_shared_size = AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared)); in amdgpu_vcn_sw_init()207 log_offset = offsetof(struct amdgpu_vcn4_fw_shared, fw_log); in amdgpu_vcn_sw_init()