Searched refs:allowed_sclk_vddc_table (Results 1 – 2 of 2) sorted by relevance
3408 if (allowed_sclk_vddc_table->count < 1) in ci_setup_default_dpm_tables()3432 for (i = 0; i < allowed_sclk_vddc_table->count; i++) { in ci_setup_default_dpm_tables()3435 allowed_sclk_vddc_table->entries[i].clk)) { in ci_setup_default_dpm_tables()3437 allowed_sclk_vddc_table->entries[i].clk; in ci_setup_default_dpm_tables()3457 for (i = 0; i < allowed_sclk_vddc_table->count; i++) { in ci_setup_default_dpm_tables()3459 allowed_sclk_vddc_table->entries[i].v; in ci_setup_default_dpm_tables()3464 pi->dpm_table.vddc_table.count = allowed_sclk_vddc_table->count; in ci_setup_default_dpm_tables()4875 if (allowed_sclk_vddc_table->count < 1) in ci_set_private_data_variables_based_on_pptable()4884 allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].v; in ci_set_private_data_variables_based_on_pptable()4891 allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].clk; in ci_set_private_data_variables_based_on_pptable()[all …]
2845 …struct phm_clock_voltage_dependency_table *allowed_sclk_vddc_table = hwmgr->dyn_state.vddc_depende… in smu7_set_private_data_based_on_pptable_v0() local2849 PP_ASSERT_WITH_CODE(allowed_sclk_vddc_table != NULL, in smu7_set_private_data_based_on_pptable_v0()2852 PP_ASSERT_WITH_CODE(allowed_sclk_vddc_table->count >= 1, in smu7_set_private_data_based_on_pptable_v0()2863 data->min_vddc_in_pptable = (uint16_t)allowed_sclk_vddc_table->entries[0].v; in smu7_set_private_data_based_on_pptable_v0()2864 …data->max_vddc_in_pptable = (uint16_t)allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->co… in smu7_set_private_data_based_on_pptable_v0()2867 allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].clk; in smu7_set_private_data_based_on_pptable_v0()2871 allowed_sclk_vddc_table->entries[allowed_sclk_vddc_table->count - 1].v; in smu7_set_private_data_based_on_pptable_v0()