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Searched refs:adjusted_mode (Results 1 – 25 of 259) sorted by relevance

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/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_pfit.c292 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; in centre_horizontally()
293 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; in centre_horizontally()
301 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width; in centre_horizontally()
303 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; in centre_horizontally()
304 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width; in centre_horizontally()
314 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; in centre_vertically()
315 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start; in centre_vertically()
324 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos; in centre_vertically()
325 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width; in centre_vertically()
366 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in i9xx_scale_aspect() local
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H A Dintel_vrr.c81 crtc_state->hw.adjusted_mode.crtc_vdisplay; in intel_vrr_real_vblank_delay()
183 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in is_cmrr_frac_required() local
191 adjusted_mode->crtc_clock * 1000 / adjusted_mode->crtc_htotal; in is_cmrr_frac_required()
206 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in cmrr_get_vtotal() local
234 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in intel_vrr_compute_config() local
258 vmax = adjusted_mode->crtc_clock * 1000 / in intel_vrr_compute_config()
304 (crtc_state->hw.adjusted_mode.crtc_vtotal - in intel_vrr_compute_config()
305 crtc_state->hw.adjusted_mode.vsync_start); in intel_vrr_compute_config()
307 (crtc_state->hw.adjusted_mode.crtc_vtotal - in intel_vrr_compute_config()
308 crtc_state->hw.adjusted_mode.vsync_end); in intel_vrr_compute_config()
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H A Dvlv_dsi.c275 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dsi_compute_config() local
1094 adjusted_mode->crtc_hsync_start = hfp + adjusted_mode->crtc_hdisplay; in bxt_dsi_get_pipe_config()
1096 adjusted_mode->crtc_hblank_start = adjusted_mode->crtc_hdisplay; in bxt_dsi_get_pipe_config()
1097 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_htotal; in bxt_dsi_get_pipe_config()
1099 adjusted_mode->crtc_vsync_start = vfp + adjusted_mode->crtc_vdisplay; in bxt_dsi_get_pipe_config()
1101 adjusted_mode->crtc_vblank_start = adjusted_mode->crtc_vdisplay; in bxt_dsi_get_pipe_config()
1102 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vtotal; in bxt_dsi_get_pipe_config()
1230 hfp = adjusted_mode->crtc_hsync_start - adjusted_mode->crtc_hdisplay; in set_dsi_timings()
1232 hbp = adjusted_mode->crtc_htotal - adjusted_mode->crtc_hsync_end; in set_dsi_timings()
1243 vfp = adjusted_mode->crtc_vsync_start - adjusted_mode->crtc_vdisplay; in set_dsi_timings()
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H A Dintel_alpm.c150 aux_less_wake_lines = intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, in _lnl_compute_aux_less_alpm_params()
184 intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, 5); in _lnl_compute_alpm_params()
249 &crtc_state->hw.adjusted_mode, io_wake_time); in intel_alpm_compute_params()
251 &crtc_state->hw.adjusted_mode, fast_wake_time); in intel_alpm_compute_params()
275 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in intel_alpm_lobf_compute_config() local
298 context_latency = adjusted_mode->crtc_vblank_start - adjusted_mode->crtc_vdisplay; in intel_alpm_lobf_compute_config()
299 guardband = adjusted_mode->crtc_vtotal - in intel_alpm_lobf_compute_config()
300 adjusted_mode->crtc_vdisplay - context_latency; in intel_alpm_lobf_compute_config()
301 first_sdp_position = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vsync_start; in intel_alpm_lobf_compute_config()
H A Dintel_panel.c126 const struct drm_display_mode *adjusted_mode) in intel_panel_downclock_mode() argument
136 if (is_alt_drrs_mode(fixed_mode, adjusted_mode) && in intel_panel_downclock_mode()
148 const struct drm_display_mode *adjusted_mode) in intel_panel_highest_mode() argument
201 struct drm_display_mode *adjusted_mode) in intel_panel_compute_config() argument
204 intel_panel_fixed_mode(connector, adjusted_mode); in intel_panel_compute_config()
211 vrefresh = drm_mode_vrefresh(adjusted_mode); in intel_panel_compute_config()
238 drm_mode_copy(adjusted_mode, fixed_mode); in intel_panel_compute_config()
241 adjusted_mode->vtotal = in intel_panel_compute_config()
242 DIV_ROUND_CLOSEST(adjusted_mode->clock * 1000, in intel_panel_compute_config()
243 adjusted_mode->htotal * vrefresh); in intel_panel_compute_config()
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H A Ddvo_ns2501.c574 adjusted_mode->crtc_clock, in ns2501_mode_set()
575 adjusted_mode->crtc_hdisplay, in ns2501_mode_set()
577 adjusted_mode->crtc_hblank_end, in ns2501_mode_set()
578 adjusted_mode->crtc_hsync_start, in ns2501_mode_set()
579 adjusted_mode->crtc_hsync_end, in ns2501_mode_set()
580 adjusted_mode->crtc_htotal, in ns2501_mode_set()
581 adjusted_mode->crtc_hskew, in ns2501_mode_set()
582 adjusted_mode->crtc_vdisplay, in ns2501_mode_set()
584 adjusted_mode->crtc_vblank_end, in ns2501_mode_set()
586 adjusted_mode->crtc_vsync_end, in ns2501_mode_set()
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H A Dintel_dvo.c179 pipe_config->hw.adjusted_mode.flags |= flags; in intel_dvo_get_config()
181 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_dvo_get_config()
210 &pipe_config->hw.adjusted_mode); in intel_enable_dvo()
259 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dvo_compute_config() local
272 ret = intel_panel_compute_config(connector, adjusted_mode); in intel_dvo_compute_config()
277 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) in intel_dvo_compute_config()
293 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dvo_pre_enable() local
307 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) in intel_dvo_pre_enable()
309 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) in intel_dvo_pre_enable()
313 DVO_SRCDIM_HORIZONTAL(adjusted_mode->crtc_hdisplay) | in intel_dvo_pre_enable()
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H A Dicl_dsi.c306 &pipe_config->hw.adjusted_mode; in configure_dual_link_mode()
853 &crtc_state->hw.adjusted_mode; in gen11_dsi_set_transcoder_timings()
1482 adjusted_mode->crtc_htotal = in gen11_dsi_get_timings()
1486 adjusted_mode->crtc_hsync_end = in gen11_dsi_get_timings()
1493 adjusted_mode->crtc_hdisplay -= in gen11_dsi_get_timings()
1497 adjusted_mode->crtc_hblank_start = adjusted_mode->crtc_hdisplay; in gen11_dsi_get_timings()
1498 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_htotal; in gen11_dsi_get_timings()
1506 adjusted_mode->crtc_vblank_start = adjusted_mode->crtc_vdisplay; in gen11_dsi_get_timings()
1507 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vtotal; in gen11_dsi_get_timings()
1640 &pipe_config->hw.adjusted_mode; in gen11_dsi_compute_config()
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H A Dintel_crt.c183 const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in intel_crt_set_dpms() local
191 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) in intel_crt_set_dpms()
193 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) in intel_crt_set_dpms()
405 struct drm_display_mode *adjusted_mode = in intel_crt_compute_config() local
406 &crtc_state->hw.adjusted_mode; in intel_crt_compute_config()
421 struct drm_display_mode *adjusted_mode = in pch_crt_compute_config() local
422 &crtc_state->hw.adjusted_mode; in pch_crt_compute_config()
442 struct drm_display_mode *adjusted_mode = in hsw_crt_compute_config() local
443 &crtc_state->hw.adjusted_mode; in hsw_crt_compute_config()
449 if (adjusted_mode->crtc_hdisplay > 4096 || in hsw_crt_compute_config()
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H A Dintel_panel.h36 const struct drm_display_mode *adjusted_mode);
39 const struct drm_display_mode *adjusted_mode);
46 struct drm_display_mode *adjusted_mode);
H A Dintel_dp_mst.c112 &crtc_state->hw.adjusted_mode; in intel_dp_mst_max_dpt_bpp()
146 &crtc_state->hw.adjusted_mode; in intel_dp_mst_bw_overhead()
158 adjusted_mode->hdisplay, in intel_dp_mst_bw_overhead()
176 &crtc_state->hw.adjusted_mode; in intel_dp_mst_compute_m_n()
204 &crtc_state->hw.adjusted_mode; in intel_dp_mst_dsc_get_slice_count()
208 adjusted_mode->clock, in intel_dp_mst_dsc_get_slice_count()
209 adjusted_mode->hdisplay, in intel_dp_mst_dsc_get_slice_count()
227 (adjusted_mode->htotal - adjusted_mode->hdisplay, 4) * bpp_x16), in intel_dp_mst_compute_min_hblank()
244 &crtc_state->hw.adjusted_mode; in intel_dp_mtp_tu_compute_config()
511 &crtc_state->hw.adjusted_mode; in hblank_expansion_quirk_needs_dsc()
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H A Dintel_vblank.c517 drm_mode_init(mode, &crtc_state->hw.adjusted_mode); in intel_crtc_active_timings()
535 struct drm_display_mode adjusted_mode; in intel_crtc_update_active_timings() local
539 intel_crtc_active_timings(&adjusted_mode, &vmax_vblank_start, in intel_crtc_update_active_timings()
562 drm_calc_timestamping_constants(&crtc->base, &adjusted_mode); in intel_crtc_update_active_timings()
651 const struct drm_display_mode *adjusted_mode; in intel_vblank_evade_init() local
663 adjusted_mode = &crtc_state->hw.adjusted_mode; in intel_vblank_evade_init()
677 evade->vblank_start = intel_mode_vblank_start(adjusted_mode); in intel_vblank_evade_init()
679 vblank_delay = intel_mode_vblank_delay(adjusted_mode); in intel_vblank_evade_init()
683 evade->min = evade->vblank_start - intel_usecs_to_scanlines(adjusted_mode, in intel_vblank_evade_init()
H A Dintel_tv.c1095 struct drm_display_mode *adjusted_mode = in intel_tv_get_config() local
1096 &pipe_config->hw.adjusted_mode; in intel_tv_get_config()
1163 adjusted_mode->crtc_clock = mode.clock; in intel_tv_get_config()
1165 adjusted_mode->crtc_clock /= 2; in intel_tv_get_config()
1201 struct drm_display_mode *adjusted_mode = in intel_tv_compute_config() local
1202 &pipe_config->hw.adjusted_mode; in intel_tv_compute_config()
1228 drm_mode_set_crtcinfo(adjusted_mode, 0); in intel_tv_compute_config()
1260 adjusted_mode->clock /= 2; in intel_tv_compute_config()
1261 adjusted_mode->crtc_clock /= 2; in intel_tv_compute_config()
1272 DRM_MODE_ARG(adjusted_mode)); in intel_tv_compute_config()
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/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_encoders.c165 struct drm_display_mode *adjusted_mode) in amdgpu_panel_mode_fixup() argument
176 adjusted_mode->clock = native_mode->clock; in amdgpu_panel_mode_fixup()
177 adjusted_mode->flags = native_mode->flags; in amdgpu_panel_mode_fixup()
184 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width; in amdgpu_panel_mode_fixup()
188 adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width; in amdgpu_panel_mode_fixup()
195 adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank; in amdgpu_panel_mode_fixup()
196 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover; in amdgpu_panel_mode_fixup()
197 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width; in amdgpu_panel_mode_fixup()
199 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank; in amdgpu_panel_mode_fixup()
200 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover; in amdgpu_panel_mode_fixup()
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/linux-6.15/drivers/gpu/drm/radeon/
H A Dradeon_encoders.c321 struct drm_display_mode *adjusted_mode) in radeon_panel_mode_fixup() argument
334 adjusted_mode->clock = native_mode->clock; in radeon_panel_mode_fixup()
335 adjusted_mode->flags = native_mode->flags; in radeon_panel_mode_fixup()
344 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width; in radeon_panel_mode_fixup()
348 adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width; in radeon_panel_mode_fixup()
357 adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank; in radeon_panel_mode_fixup()
358 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover; in radeon_panel_mode_fixup()
359 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width; in radeon_panel_mode_fixup()
361 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank; in radeon_panel_mode_fixup()
362 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover; in radeon_panel_mode_fixup()
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/linux-6.15/drivers/gpu/drm/gma500/
H A Doaktrail_crtc.c361 struct drm_display_mode *adjusted_mode, in oaktrail_crtc_mode_set() argument
440 offsetX = (adjusted_mode->crtc_hdisplay - in oaktrail_crtc_mode_set()
442 offsetY = (adjusted_mode->crtc_vdisplay - in oaktrail_crtc_mode_set()
447 ((adjusted_mode->crtc_htotal - 1) << 16), i); in oaktrail_crtc_mode_set()
449 ((adjusted_mode->crtc_vtotal - 1) << 16), i); in oaktrail_crtc_mode_set()
454 (adjusted_mode->crtc_hsync_start - offsetX - 1) | in oaktrail_crtc_mode_set()
466 ((adjusted_mode->crtc_htotal - 1) << 16), i); in oaktrail_crtc_mode_set()
468 ((adjusted_mode->crtc_vtotal - 1) << 16), i); in oaktrail_crtc_mode_set()
472 ((adjusted_mode->crtc_hsync_end - 1) << 16), i); in oaktrail_crtc_mode_set()
476 ((adjusted_mode->crtc_vsync_end - 1) << 16), i); in oaktrail_crtc_mode_set()
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H A Doaktrail_hdmi.c329 temp = htotal_calculate(adjusted_mode); in oaktrail_crtc_hdmi_mode_set()
331 …REG_WRITE(hblank_reg, (adjusted_mode->crtc_hblank_start - 1) | ((adjusted_mode->crtc_hblank_end - … in oaktrail_crtc_hdmi_mode_set()
332 …REG_WRITE(hsync_reg, (adjusted_mode->crtc_hsync_start - 1) | ((adjusted_mode->crtc_hsync_end - 1) … in oaktrail_crtc_hdmi_mode_set()
333 REG_WRITE(vtot_reg, (adjusted_mode->crtc_vdisplay - 1) | ((adjusted_mode->crtc_vtotal - 1) << 16)); in oaktrail_crtc_hdmi_mode_set()
334 …REG_WRITE(vblank_reg, (adjusted_mode->crtc_vblank_start - 1) | ((adjusted_mode->crtc_vblank_end - … in oaktrail_crtc_hdmi_mode_set()
335 …REG_WRITE(vsync_reg, (adjusted_mode->crtc_vsync_start - 1) | ((adjusted_mode->crtc_vsync_end - 1) … in oaktrail_crtc_hdmi_mode_set()
338 …REG_WRITE(PCH_HTOTAL_B, (adjusted_mode->crtc_hdisplay - 1) | ((adjusted_mode->crtc_htotal - 1) << … in oaktrail_crtc_hdmi_mode_set()
340 …REG_WRITE(PCH_HSYNC_B, (adjusted_mode->crtc_hsync_start - 1) | ((adjusted_mode->crtc_hsync_end - 1… in oaktrail_crtc_hdmi_mode_set()
341 …REG_WRITE(PCH_VTOTAL_B, (adjusted_mode->crtc_vdisplay - 1) | ((adjusted_mode->crtc_vtotal - 1) << … in oaktrail_crtc_hdmi_mode_set()
343 …REG_WRITE(PCH_VSYNC_B, (adjusted_mode->crtc_vsync_start - 1) | ((adjusted_mode->crtc_vsync_end - 1… in oaktrail_crtc_hdmi_mode_set()
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H A Dpsb_intel_display.c95 struct drm_display_mode *adjusted_mode, in psb_intel_crtc_mode_set() argument
152 adjusted_mode->clock, clock.dot); in psb_intel_crtc_mode_set()
166 adjusted_mode->clock / mode->clock; in psb_intel_crtc_mode_set()
267 REG_WRITE(map->htotal, (adjusted_mode->crtc_hdisplay - 1) | in psb_intel_crtc_mode_set()
268 ((adjusted_mode->crtc_htotal - 1) << 16)); in psb_intel_crtc_mode_set()
270 ((adjusted_mode->crtc_hblank_end - 1) << 16)); in psb_intel_crtc_mode_set()
272 ((adjusted_mode->crtc_hsync_end - 1) << 16)); in psb_intel_crtc_mode_set()
273 REG_WRITE(map->vtotal, (adjusted_mode->crtc_vdisplay - 1) | in psb_intel_crtc_mode_set()
274 ((adjusted_mode->crtc_vtotal - 1) << 16)); in psb_intel_crtc_mode_set()
276 ((adjusted_mode->crtc_vblank_end - 1) << 16)); in psb_intel_crtc_mode_set()
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H A Dcdv_intel_lvds.c182 struct drm_display_mode *adjusted_mode) in cdv_intel_lvds_mode_fixup() argument
207 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay; in cdv_intel_lvds_mode_fixup()
209 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end; in cdv_intel_lvds_mode_fixup()
210 adjusted_mode->htotal = panel_fixed_mode->htotal; in cdv_intel_lvds_mode_fixup()
211 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay; in cdv_intel_lvds_mode_fixup()
214 adjusted_mode->vtotal = panel_fixed_mode->vtotal; in cdv_intel_lvds_mode_fixup()
215 adjusted_mode->clock = panel_fixed_mode->clock; in cdv_intel_lvds_mode_fixup()
216 drm_mode_set_crtcinfo(adjusted_mode, in cdv_intel_lvds_mode_fixup()
262 struct drm_display_mode *adjusted_mode) in cdv_intel_lvds_mode_set() argument
280 if (mode->hdisplay != adjusted_mode->hdisplay || in cdv_intel_lvds_mode_set()
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H A Dpsb_intel_lvds.c363 struct drm_display_mode *adjusted_mode) in psb_intel_lvds_mode_fixup() argument
402 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay; in psb_intel_lvds_mode_fixup()
404 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end; in psb_intel_lvds_mode_fixup()
405 adjusted_mode->htotal = panel_fixed_mode->htotal; in psb_intel_lvds_mode_fixup()
406 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay; in psb_intel_lvds_mode_fixup()
409 adjusted_mode->vtotal = panel_fixed_mode->vtotal; in psb_intel_lvds_mode_fixup()
410 adjusted_mode->clock = panel_fixed_mode->clock; in psb_intel_lvds_mode_fixup()
411 drm_mode_set_crtcinfo(adjusted_mode, in psb_intel_lvds_mode_fixup()
457 struct drm_display_mode *adjusted_mode) in psb_intel_lvds_mode_set() argument
474 if (mode->hdisplay != adjusted_mode->hdisplay || in psb_intel_lvds_mode_set()
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H A Dcdv_intel_display.c573 struct drm_display_mode *adjusted_mode, in cdv_intel_crtc_mode_set() argument
653 drm_mode_debug_printmodeline(adjusted_mode); in cdv_intel_crtc_mode_set()
661 adjusted_mode->clock, clock.dot); in cdv_intel_crtc_mode_set()
668 cdv_intel_dp_set_m_n(crtc, mode, adjusted_mode); in cdv_intel_crtc_mode_set()
783 REG_WRITE(map->htotal, (adjusted_mode->crtc_hdisplay - 1) | in cdv_intel_crtc_mode_set()
784 ((adjusted_mode->crtc_htotal - 1) << 16)); in cdv_intel_crtc_mode_set()
786 ((adjusted_mode->crtc_hblank_end - 1) << 16)); in cdv_intel_crtc_mode_set()
788 ((adjusted_mode->crtc_hsync_end - 1) << 16)); in cdv_intel_crtc_mode_set()
790 ((adjusted_mode->crtc_vtotal - 1) << 16)); in cdv_intel_crtc_mode_set()
792 ((adjusted_mode->crtc_vblank_end - 1) << 16)); in cdv_intel_crtc_mode_set()
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/linux-6.15/drivers/gpu/drm/ast/
H A Dast_mode.c142 const struct drm_display_mode *adjusted_mode, in ast_set_vbios_mode_reg() argument
656 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; in ast_crtc_helper_mode_set_nofb() local
668 ast_set_std_reg(ast, adjusted_mode, std_table); in ast_crtc_helper_mode_set_nofb()
669 ast_set_crtc_reg(ast, adjusted_mode, vmode); in ast_crtc_helper_mode_set_nofb()
670 ast_set_dclk_reg(ast, adjusted_mode, vmode); in ast_crtc_helper_mode_set_nofb()
672 ast_set_sync_reg(ast, adjusted_mode, vmode); in ast_crtc_helper_mode_set_nofb()
679 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; in ast_crtc_helper_atomic_check() local
756 adjusted_mode->crtc_hdisplay = vmode->hde; in ast_crtc_helper_atomic_check()
761 adjusted_mode->crtc_htotal = vmode->ht; in ast_crtc_helper_atomic_check()
763 adjusted_mode->crtc_vdisplay = vmode->vde; in ast_crtc_helper_atomic_check()
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/linux-6.15/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_crtc.c58 pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000ULL; in komeda_crtc_update_clock_ratio()
117 struct drm_display_mode *mode = &kcrtc_st->base.adjusted_mode; in komeda_crtc_prepare()
461 struct drm_display_mode *adjusted_mode) in komeda_crtc_mode_fixup() argument
466 drm_mode_set_crtcinfo(adjusted_mode, 0); in komeda_crtc_mode_fixup()
469 adjusted_mode->crtc_clock /= 2; in komeda_crtc_mode_fixup()
470 adjusted_mode->crtc_hdisplay /= 2; in komeda_crtc_mode_fixup()
471 adjusted_mode->crtc_hsync_start /= 2; in komeda_crtc_mode_fixup()
472 adjusted_mode->crtc_hsync_end /= 2; in komeda_crtc_mode_fixup()
473 adjusted_mode->crtc_htotal /= 2; in komeda_crtc_mode_fixup()
476 clk_rate = adjusted_mode->crtc_clock * 1000; in komeda_crtc_mode_fixup()
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/linux-6.15/drivers/gpu/drm/nouveau/include/dispnv04/i2c/
H A Dencoder_i2c.h81 struct drm_display_mode *adjusted_mode);
94 struct drm_display_mode *adjusted_mode);
213 struct drm_display_mode *adjusted_mode);
/linux-6.15/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_encoder.c21 struct drm_display_mode *adjusted_mode) in mdp5_vid_encoder_mode_set() argument
34 mode = adjusted_mode; in mdp5_vid_encoder_mode_set()
179 struct drm_display_mode *adjusted_mode) in mdp5_encoder_mode_set() argument
185 mdp5_cmd_encoder_mode_set(encoder, mode, adjusted_mode); in mdp5_encoder_mode_set()
187 mdp5_vid_encoder_mode_set(encoder, mode, adjusted_mode); in mdp5_encoder_mode_set()
208 mdp5_encoder_mode_set(encoder, &cstate->mode, &cstate->adjusted_mode); in mdp5_encoder_enable()

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