Searched refs:a6xx (Results 1 – 7 of 7) sorted by relevance
687 .a6xx = &(const struct a6xx_info) {719 .a6xx = &(const struct a6xx_info) {749 .a6xx = &(const struct a6xx_info) {774 .a6xx = &(const struct a6xx_info) {797 .a6xx = &(const struct a6xx_info) {821 .a6xx = &(const struct a6xx_info) {845 .a6xx = &(const struct a6xx_info) {871 .a6xx = &(const struct a6xx_info) {894 .a6xx = &(const struct a6xx_info) {927 .a6xx = &(const struct a6xx_info) {[all …]
502 if (!(adreno_gpu->info->a6xx->hwcg || adreno_is_a7xx(adreno_gpu))) in a6xx_set_hwcg()518 state ? adreno_gpu->info->a6xx->gmu_cgc_mode : 0); in a6xx_set_hwcg()524 if (!adreno_gpu->info->a6xx->hwcg) { in a6xx_set_hwcg()553 for (i = 0; (reg = &adreno_gpu->info->a6xx->hwcg[i], reg->offset); i++) in a6xx_set_hwcg()566 const struct adreno_protect *protect = adreno_gpu->info->a6xx->protect; in a6xx_set_cp_protect()723 reglist = adreno_gpu->info->a6xx->pwrup_reglist; in a7xx_patch_pwrup_reglist()1187 if (adreno_gpu->info->a6xx->prim_fifo_threshold) in hw_init()1189 adreno_gpu->info->a6xx->prim_fifo_threshold); in hw_init()
113 const struct a6xx_info *info = adreno_gpu->info->a6xx; in a6xx_gmu_set_freq()828 const struct a6xx_info *a6xx_info = adreno_gpu->info->a6xx; in a6xx_gmu_fw_start()1548 const struct a6xx_info *info = adreno_gpu->info->a6xx; in a6xx_gmu_rpmh_votes_init()1635 const struct a6xx_info *info = adreno_gpu->info->a6xx; in a6xx_gmu_pwrlevels_probe()
105 const struct a6xx_info *a6xx; member
710 const struct a6xx_info *info = adreno_gpu->info->a6xx; in a6xx_hfi_send_bw_table()
109 For a5xx and a6xx devices this node contains a memory-region that291 // Example a6xx (with GMU):
198 generated/a6xx.xml.h \