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/linux-6.15/drivers/infiniband/hw/irdma/
H A Di40iw_hw.h34 #define I40E_GLHMC_VFPDINV(_i) (0x000C8300 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ argument
38 #define I40E_GLPES_PFIP4RXDISCARD(_i) (0x00010600 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
39 #define I40E_GLPES_PFIP4RXTRUNC(_i) (0x00010700 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
40 #define I40E_GLPES_PFIP4TXNOROUTE(_i) (0x00012E00 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
41 #define I40E_GLPES_PFIP6RXDISCARD(_i) (0x00011200 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
42 #define I40E_GLPES_PFIP6RXTRUNC(_i) (0x00011300 + ((_i) * 4)) /* _i=0...15 */ /* Reset… argument
44 #define I40E_GLPES_PFRDMAVBNDLO(_i) (0x00014800 + ((_i) * 8)) /* _i=0...15 */ /* Reset… argument
45 #define I40E_GLPES_PFIP4TXMCOCTSLO(_i) (0x00012000 + ((_i) * 8)) /* _i=0...15 */ /* Reset… argument
46 #define I40E_GLPES_PFIP6RXMCOCTSLO(_i) (0x00011600 + ((_i) * 8)) /* _i=0...15 */ /* Reset… argument
47 #define I40E_GLPES_PFIP6TXMCOCTSLO(_i) (0x00012A00 + ((_i) * 8)) /* _i=0...15 */ /* Reset… argument
[all …]
/linux-6.15/drivers/net/ethernet/intel/i40e/
H A Di40e_register.h74 #define I40E_PRTDCB_RETSTCC(_i) (0x00122180 + ((_i) * 32)) /* _i=0...7 */ /* Reset: CORER */ argument
109 #define I40E_PRTDCB_RUPTQ(_i) (0x00122400 + ((_i) * 32)) /* _i=0...7 */ /* Reset: CORER */ argument
116 #define I40E_PRTDCB_TCMSTC(_i) (0x000A0040 + ((_i) * 32)) /* _i=0...7 */ /* Reset: CORER */ argument
127 #define I40E_PRTDCB_TCWSTC(_i) (0x000A2040 + ((_i) * 32)) /* _i=0...7 */ /* Reset: CORER */ argument
182 #define I40E_GLGEN_GPIO_CTL(_i) (0x00088100 + ((_i) * 4)) /* _i=0...29 */ /* Reset: POR */ argument
203 #define I40E_GLGEN_MSCA(_i) (0x0008818C + ((_i) * 4)) /* _i=0...3 */ /* Reset: POR */ argument
208 #define I40E_GLGEN_MSCA_OPCODE_MASK(_i) I40E_MASK(_i, I40E_GLGEN_MSCA_OPCODE_SHIFT) argument
210 #define I40E_GLGEN_MSCA_STCODE_MASK(_i) I40E_MASK(_i, I40E_GLGEN_MSCA_STCODE_SHIFT) argument
215 #define I40E_GLGEN_MSRWD(_i) (0x0008819C + ((_i) * 4)) /* _i=0...3 */ /* Reset: POR */ argument
387 #define I40E_PFINT_ITR0(_i) (0x00038000 + ((_i) * 128)) /* _i=0...2 */ /* Reset: PFR */ argument
[all …]
/linux-6.15/drivers/net/ethernet/intel/ice/
H A Dice_hw_autogen.h9 #define GLCOMM_QUANTA_PROF(_i) (0x002D2D68 + ((_i) * 4)) argument
466 #define GLPRT_RFC(_i) (0x00380AC0 + ((_i) * 8)) argument
467 #define GLPRT_RJC(_i) (0x00380B00 + ((_i) * 8)) argument
469 #define GLPRT_ROC(_i) (0x00380240 + ((_i) * 8)) argument
470 #define GLPRT_RUC(_i) (0x00380200 + ((_i) * 8)) argument
476 #define GLV_BPRCL(_i) (0x003B6000 + ((_i) * 8)) argument
477 #define GLV_BPTCL(_i) (0x0030E000 + ((_i) * 8)) argument
478 #define GLV_GORCL(_i) (0x003B0000 + ((_i) * 8)) argument
479 #define GLV_GOTCL(_i) (0x00300000 + ((_i) * 8)) argument
480 #define GLV_MPRCL(_i) (0x003B4000 + ((_i) * 8)) argument
[all …]
/linux-6.15/include/math-emu/
H A Dop-8.h41 for (_i = 7; _i >= _skip; --_i) \
42 X##_f[_i] = X##_f[_i-_skip]; \
45 for (_i = 7; _i > _skip; --_i) \
50 for (; _i >= 0; --_i) \
61 for (_i = 0; _i <= 7-_skip; ++_i) \
65 for (_i = 0; _i < 7-_skip; ++_i) \
70 for (; _i < 8; ++_i) \
87 for (_s = _i = 0; _i < _skip; ++_i) \
92 for (_i = 0; _i <= 7-_skip; ++_i) \
96 for (_i = 0; _i < 7-_skip; ++_i) \
[all …]
H A Dop-4.h44 for (_i = 3; _i >= _skip; --_i) \
45 X##_f[_i] = X##_f[_i-_skip]; \
48 for (_i = 3; _i > _skip; --_i) \
53 for (; _i >= 0; --_i) \
65 for (_i = 0; _i <= 3-_skip; ++_i) \
69 for (_i = 0; _i < 3-_skip; ++_i) \
74 for (; _i < 4; ++_i) \
91 for (_s = _i = 0; _i < _skip; ++_i) \
96 for (_i = 0; _i <= 3-_skip; ++_i) \
100 for (_i = 0; _i < 3-_skip; ++_i) \
[all …]
/linux-6.15/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_type.h280 #define IXGBE_EITR(_i) (((_i) <= 23) ? (0x00820 + ((_i) * 4)) : \ argument
309 #define IXGBE_RDBAL(_i) (((_i) < 64) ? (0x01000 + ((_i) * 0x40)) : \ argument
311 #define IXGBE_RDBAH(_i) (((_i) < 64) ? (0x01004 + ((_i) * 0x40)) : \ argument
313 #define IXGBE_RDLEN(_i) (((_i) < 64) ? (0x01008 + ((_i) * 0x40)) : \ argument
315 #define IXGBE_RDH(_i) (((_i) < 64) ? (0x01010 + ((_i) * 0x40)) : \ argument
317 #define IXGBE_RDT(_i) (((_i) < 64) ? (0x01018 + ((_i) * 0x40)) : \ argument
319 #define IXGBE_RXDCTL(_i) (((_i) < 64) ? (0x01028 + ((_i) * 0x40)) : \ argument
333 #define IXGBE_SRRCTL(_i) (((_i) <= 15) ? (0x02100 + ((_i) * 4)) : \ argument
359 #define IXGBE_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \ argument
361 #define IXGBE_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \ argument
[all …]
/linux-6.15/fs/bcachefs/
H A Dreplicas.h57 for (_i = (_r)->entries; \
59 _i = (void *) (_i) + (_r)->entry_size)
63 #define replicas_entry_next(_i) \ argument
64 ((typeof(_i)) ((void *) (_i) + replicas_entry_bytes(_i)))
66 #define for_each_replicas_entry(_r, _i) \ argument
67 for (_i = (_r)->entries; \
68 (void *) (_i) < vstruct_end(&(_r)->field) && (_i)->data_type;\
69 (_i) = replicas_entry_next(_i))
72 for (_i = (_r)->entries; \
73 (void *) (_i) < vstruct_end(&(_r)->field) && (_i)->data_type;\
[all …]
H A Deytzinger.h161 #define eytzinger1_for_each(_i, _size) \ argument
163 (_i) != 0; \
164 (_i) = eytzinger1_next((_i), (_size)))
234 (_i) != -1; \
235 (_i) = eytzinger0_next((_i), (_size)))
239 (_i) != -1; \
240 (_i) = eytzinger0_prev((_i), (_size)))
287 size_t _i = 1; \
290 while (_i <= _nr && \
292 _i = eytzinger1_child(_i, _res > 0); \
[all …]
H A Dvstructs.h50 #define vstruct_for_each(_s, _i) \ argument
51 for (typeof(&(_s)->start[0]) _i = (_s)->start; \
52 _i < vstruct_last(_s); \
53 _i = vstruct_next(_i))
55 #define vstruct_for_each_safe(_s, _i) \ argument
56 for (typeof(&(_s)->start[0]) _next, _i = (_s)->start; \
57 _i < vstruct_last(_s) && (_next = vstruct_next(_i), true); \
58 _i = _next)
H A Ddarray.h79 #define __darray_for_each(_d, _i) \ argument
80 for ((_i) = (_d).data; _i < (_d).data + (_d).nr; _i++)
82 #define darray_for_each(_d, _i) \ argument
83 for (typeof(&(_d).data[0]) _i = (_d).data; _i < (_d).data + (_d).nr; _i++)
85 #define darray_for_each_reverse(_d, _i) \ argument
86 for (typeof(&(_d).data[0]) _i = (_d).data + (_d).nr - 1; _i >= (_d).data && (_d).nr; --_i)
/linux-6.15/drivers/input/mouse/
H A Dalps.h92 #define SS4_MF_LF_V2(_b, _i) ((_b[1 + (_i) * 3] & 0x0004) == 0x0004) argument
96 #define SS4_STD_MF_X_V2(_b, _i) (((_b[0 + (_i) * 3] << 5) & 0x00E0) | \ argument
97 ((_b[1 + _i * 3] << 5) & 0x1F00) \
100 #define SS4_PLUS_STD_MF_X_V2(_b, _i) (((_b[0 + (_i) * 3] << 4) & 0x0070) | \ argument
104 #define SS4_STD_MF_Y_V2(_b, _i) (((_b[1 + (_i) * 3] << 3) & 0x0010) | \ argument
106 ((_b[2 + (_i) * 3] << 4) & 0x0E00) \
109 #define SS4_BTL_MF_X_V2(_b, _i) (SS4_STD_MF_X_V2(_b, _i) | \ argument
110 ((_b[0 + (_i) * 3] >> 3) & 0x0010) \
113 #define SS4_PLUS_BTL_MF_X_V2(_b, _i) (SS4_PLUS_STD_MF_X_V2(_b, _i) | \ argument
117 #define SS4_BTL_MF_Y_V2(_b, _i) (SS4_STD_MF_Y_V2(_b, _i) | \ argument
[all …]
/linux-6.15/drivers/net/dsa/qca/
H A Dqca8k.h103 #define QCA8K_LED_CTRL_REG(_i) (0x050 + (_i) * 4) argument
108 #define QCA8K_LED_CTRL_SHIFT(_i) (((_i) % 2) * 16) argument
137 #define QCA8K_REG_PORT_STATUS(_i) (0x07c + (_i) * 4) argument
151 #define QCA8K_REG_PORT_HDR_CTRL(_i) (0x9c + (_i * 4)) argument
176 #define QCA8K_REG_EEE_CTRL_LPI_EN(_i) ((_i + 1) * 2) argument
187 #define QCA8K_REG_PORT_VLAN_CTRL0(_i) (0x420 + (_i * 8)) argument
192 #define QCA8K_REG_PORT_VLAN_CTRL1(_i) (0x424 + (_i * 8)) argument
252 #define QCA8K_PORT_LOOKUP_CTRL(_i) (0x660 + (_i) * 0xc) argument
275 #define QCA8K_REG_GOL_TRUNK_SHIFT(_i) ((_i) * 8) argument
285 #define QCA8K_REG_GOL_TRUNK_ID_SHIFT(_i) (((_i) / 2) * 16) argument
[all …]
/linux-6.15/drivers/net/ethernet/intel/igb/
H A De1000_regs.h286 #define E1000_PSRTYPE(_i) (0x05480 + ((_i) * 4)) argument
287 #define E1000_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \ argument
289 #define E1000_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \ argument
292 #define E1000_IP4AT_REG(_i) (0x05840 + ((_i) * 8)) argument
293 #define E1000_IP6AT_REG(_i) (0x05880 + ((_i) * 4)) argument
294 #define E1000_WUPM_REG(_i) (0x05A00 + ((_i) * 4)) argument
295 #define E1000_FFMT_REG(_i) (0x09000 + ((_i) * 8)) argument
296 #define E1000_FFVT_REG(_i) (0x09800 + ((_i) * 8)) argument
297 #define E1000_FFLT_REG(_i) (0x05F00 + ((_i) * 8)) argument
323 #define E1000_MSIXBM(_i) (0x01600 + ((_i) * 4)) argument
[all …]
/linux-6.15/drivers/net/wireless/ath/ath9k/
H A Dreg_wow.h127 #define AR_WOW_LEN1_SHIFT(_i) ((0x3 - ((_i) & 0x3)) << 0x3) argument
128 #define AR_WOW_LENGTH1_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN1_SHIFT(_i)) argument
129 #define AR_WOW_LEN2_SHIFT(_i) ((0x7 - ((_i) & 0x7)) << 0x3) argument
130 #define AR_WOW_LENGTH2_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN2_SHIFT(_i)) argument
131 #define AR_WOW_LEN3_SHIFT(_i) ((0xb - ((_i) & 0xb)) << 0x3) argument
132 #define AR_WOW_LENGTH3_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN3_SHIFT(_i)) argument
133 #define AR_WOW_LEN4_SHIFT(_i) ((0xf - ((_i) & 0xf)) << 0x3) argument
134 #define AR_WOW_LENGTH4_MASK(_i) (AR_WOW_LENGTH_MAX << AR_WOW_LEN4_SHIFT(_i)) argument
H A Dar9003_phy.h981 #define AR_PHY_TX_IQCAL_CORR_COEFF_B1(_i) (AR_SM1_BASE + 0x450 + ((_i) << 2)) argument
1038 #define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i) (AR_SM2_BASE + 0x450 + ((_i) << 2)) argument
1057 #define AR_PHY_SWITCH_CHAIN(_i) (AR_PHY_SWITCH_CHAIN_0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1058 #define AR_PHY_EXT_ATTEN_CTL(_i) (AR_PHY_EXT_ATTEN_CTL_0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1060 #define AR_PHY_RXGAIN(_i) (AR_PHY_FORCEMAX_GAINS_0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1061 #define AR_PHY_TPCRG5(_i) (AR_PHY_TPC_5_B0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1062 #define AR_PHY_PDADC_TAB(_i) (AR_PHY_PDADC_TAB_0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1064 #define AR_PHY_CAL_MEAS_0(_i) (AR_PHY_IQ_ADC_MEAS_0_B0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1065 #define AR_PHY_CAL_MEAS_1(_i) (AR_PHY_IQ_ADC_MEAS_1_B0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
1066 #define AR_PHY_CAL_MEAS_2(_i) (AR_PHY_IQ_ADC_MEAS_2_B0 + (AR_PHY_CHAIN_OFFSET * (_i))) argument
[all …]
/linux-6.15/drivers/crypto/cavium/nitrox/
H A Dnitrox_csr.h21 #define EMU_BIST_STATUSX(_i) (0x1402700 + ((_i) * 0x40000)) argument
29 #define EFL_CORE_BIST_REGX(_i) (0x1240100 + ((_i) * 0x400)) argument
33 #define PEM_BIST_STATUSX(_i) (0x1080468 | ((_i) << 18)) argument
36 #define EMU_SE_ENABLEX(_i) (0x1400000 + ((_i) * 0x40000)) argument
37 #define EMU_AE_ENABLEX(_i) (0x1400008 + ((_i) * 0x40000)) argument
38 #define EMU_WD_INT_ENA_W1SX(_i) (0x1402318 + ((_i) * 0x40000)) argument
39 #define EMU_GE_INT_ENA_W1SX(_i) (0x1402518 + ((_i) * 0x40000)) argument
40 #define EMU_FUSE_MAPX(_i) (0x1402708 + ((_i) * 0x40000)) argument
47 #define UCD_SE_CNTX(_i) (0x12C0040 + ((_i) * 0x1000)) argument
48 #define UCD_AE_CNTX(_i) (0x12C0048 + ((_i) * 0x800)) argument
[all …]
/linux-6.15/drivers/net/ethernet/wangxun/libwx/
H A Dwx_type.h28 #define WX_MIS_RST_LAN_RST(_i) BIT((_i) + 1) argument
90 #define WX_CFG_TAG_TPID(_i) (0x14430 + ((_i) * 4)) argument
117 #define WX_TDM_PB_THRE(_i) (0x18020 + ((_i) * 4)) argument
129 #define WX_RDB_PB_SZ(_i) (0x19020 + ((_i) * 4)) argument
146 #define WX_RDB_PL_CFG(_i) (0x19300 + ((_i) * 4)) argument
152 #define WX_RDB_RSSTBL(_i) (0x19400 + ((_i) * 4)) argument
362 #define WX_PX_IC(_i) (0x120 + (_i) * 4) argument
363 #define WX_PX_IMS(_i) (0x140 + (_i) * 4) argument
364 #define WX_PX_IMC(_i) (0x150 + (_i) * 4) argument
369 #define WX_PX_ITR(_i) (0x200 + (_i) * 4) argument
[all …]
/linux-6.15/drivers/net/ethernet/intel/e1000e/
H A Dregs.h108 #define E1000_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \ argument
109 (0x054E0 + ((_i - 16) * 8)))
110 #define E1000_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \ argument
111 (0x054E4 + ((_i - 16) * 8)))
112 #define E1000_SHRAL(_i) (0x05438 + ((_i) * 8)) argument
113 #define E1000_SHRAH(_i) (0x0543C + ((_i) * 8)) argument
224 #define E1000_RETA(_i) (0x05C00 + ((_i) * 4)) /* Redirection Table - RW */ argument
225 #define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* RSS Random Key - RW */ argument
H A Dich8lan.h47 #define E1000_SHRAL_PCH_LPT(_i) (0x05408 + ((_i) * 8)) argument
48 #define E1000_SHRAH_PCH_LPT(_i) (0x0540C + ((_i) * 8)) argument
125 #define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2))) argument
126 #define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2))) argument
127 #define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2))) argument
128 #define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2))) argument
129 #define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1))) argument
/linux-6.15/lib/crypto/mpi/
H A Dmpi-internal.h65 mpi_size_t _i; \
66 for (_i = 0; _i < (n); _i++) \
67 (d)[_i] = (s)[_i]; \
72 mpi_size_t _i; \
73 for (_i = (n)-1; _i >= 0; _i--) \
74 (d)[_i] = (s)[_i]; \
80 int _i; \
81 for (_i = 0; _i < (n); _i++) \
82 (d)[_i] = 0; \
/linux-6.15/arch/powerpc/include/asm/
H A Duaccess.h470 int _i; \
472 for (_i = 0; _i < (_len & ~(sizeof(u64) - 1)); _i += sizeof(u64)) \
476 _i += 4; \
480 _i += 2; \
483 unsafe_get_user(*(u8 *)(_dst + _i), (u8 __user *)(_src + _i), e); \
491 int _i; \
493 for (_i = 0; _i < (_len & ~(sizeof(u64) - 1)); _i += sizeof(u64)) \
496 unsafe_put_user(*(u32*)(_src + _i), (u32 __user *)(_dst + _i), e); \
497 _i += 4; \
501 _i += 2; \
[all …]
/linux-6.15/drivers/gpu/drm/armada/
H A Darmada_crtc.h18 #define armada_reg_queue_mod(_r, _i, _v, _m, _o) \ argument
21 __reg[_i].offset = _o; \
22 __reg[_i].mask = ~(_m); \
23 __reg[_i].val = _v; \
24 _i++; \
27 #define armada_reg_queue_set(_r, _i, _v, _o) \ argument
28 armada_reg_queue_mod(_r, _i, _v, ~0, _o)
30 #define armada_reg_queue_end(_r, _i) \ argument
31 armada_reg_queue_mod(_r, _i, 0, 0, ~0)
/linux-6.15/drivers/net/ethernet/intel/iavf/
H A Diavf_register.h58 #define IAVF_VFINT_ITRN1(_i, _INTVF) (0x00002800 + ((_i) * 64 + (_INTVF) * 4)) /* _i=0...2, _INTVF=… argument
61 #define IAVF_VFQF_HENA(_i) (0x0000C400 + ((_i) * 4)) /* _i=0...1 */ /* Reset: CORER */ argument
62 #define IAVF_VFQF_HKEY(_i) (0x0000CC00 + ((_i) * 4)) /* _i=0...12 */ /* Reset: CORER */ argument
64 #define IAVF_VFQF_HLUT(_i) (0x0000D000 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ argument
/linux-6.15/tools/testing/memblock/tests/
H A Dcommon.h92 for (int _i = 0; _i < (_size); _i++) { \
93 ASSERT_EQ(((char *)_seen)[_i], (_expected)); \
104 for (int _i = 0; _i < (_size); _i++) { \
105 ASSERT_NE(((char *)_seen)[_i], (_expected)); \
/linux-6.15/drivers/net/ethernet/intel/igbvf/
H A Dregs.h55 #define E1000_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \ argument
56 (0x054E0 + ((_i - 16) * 8)))
57 #define E1000_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \ argument
58 (0x054E4 + ((_i - 16) * 8)))

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