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Searched refs:__vcpu_sys_reg (Results 1 – 22 of 22) sorted by relevance

/linux-6.15/arch/arm64/kvm/hyp/vhe/
H A Dsysreg-sr.c21 __vcpu_sys_reg(vcpu, PAR_EL1) = read_sysreg(par_el1); in __sysreg_save_vel2_state()
22 __vcpu_sys_reg(vcpu, TPIDR_EL1) = read_sysreg(tpidr_el1); in __sysreg_save_vel2_state()
24 __vcpu_sys_reg(vcpu, ESR_EL2) = read_sysreg_el1(SYS_ESR); in __sysreg_save_vel2_state()
25 __vcpu_sys_reg(vcpu, AFSR0_EL2) = read_sysreg_el1(SYS_AFSR0); in __sysreg_save_vel2_state()
27 __vcpu_sys_reg(vcpu, FAR_EL2) = read_sysreg_el1(SYS_FAR); in __sysreg_save_vel2_state()
28 __vcpu_sys_reg(vcpu, MAIR_EL2) = read_sysreg_el1(SYS_MAIR); in __sysreg_save_vel2_state()
29 __vcpu_sys_reg(vcpu, VBAR_EL2) = read_sysreg_el1(SYS_VBAR); in __sysreg_save_vel2_state()
74 __vcpu_sys_reg(vcpu, CNTHCTL_EL2) |= val; in __sysreg_save_vel2_state()
77 __vcpu_sys_reg(vcpu, SP_EL2) = read_sysreg(sp_el1); in __sysreg_save_vel2_state()
87 write_sysreg(__vcpu_sys_reg(vcpu, PAR_EL1), par_el1); in __sysreg_restore_vel2_state()
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H A Dswitch.c165 val = __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0); in __activate_traps()
167 val = __vcpu_sys_reg(vcpu, CNTHP_CVAL_EL2); in __activate_traps()
201 __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0) = val; in __deactivate_traps()
203 __vcpu_sys_reg(vcpu, CNTHP_CVAL_EL2) = val; in __deactivate_traps()
278 cval = __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0); in compute_emulated_cntx_ctl_el0()
279 ctl = __vcpu_sys_reg(vcpu, CNTP_CTL_EL0); in compute_emulated_cntx_ctl_el0()
283 cval = __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0); in compute_emulated_cntx_ctl_el0()
284 ctl = __vcpu_sys_reg(vcpu, CNTV_CTL_EL0); in compute_emulated_cntx_ctl_el0()
325 val = __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0); in kvm_hyp_handle_timer()
334 val = __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0); in kvm_hyp_handle_timer()
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/linux-6.15/arch/arm64/kvm/vgic/
H A Dvgic-v3-nested.c141 u64 lr = __vcpu_sys_reg(vcpu, ICH_LRN(i)); in vgic_compute_mi_state()
176 hcr = __vcpu_sys_reg(vcpu, ICH_HCR_EL2); in vgic_v3_get_misr()
177 vmcr = __vcpu_sys_reg(vcpu, ICH_VMCR_EL2); in vgic_v3_get_misr()
184 if (__vcpu_sys_reg(vcpu, ICH_HCR_EL2) & ICH_HCR_EL2_UIE) { in vgic_v3_get_misr()
224 u64 lr = __vcpu_sys_reg(vcpu, ICH_LRN(i)); in vgic_v3_create_shadow_lr()
270 u64 lr = __vcpu_sys_reg(vcpu, ICH_LRN(i)); in vgic_v3_sync_nested()
312 s_cpu_if->vgic_vmcr = __vcpu_sys_reg(vcpu, ICH_VMCR_EL2); in vgic_v3_create_shadow_state()
359 val = __vcpu_sys_reg(vcpu, ICH_HCR_EL2); in vgic_v3_put_nested()
362 __vcpu_sys_reg(vcpu, ICH_HCR_EL2) = val; in vgic_v3_put_nested()
371 val = __vcpu_sys_reg(vcpu, ICH_LRN(i)); in vgic_v3_put_nested()
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/linux-6.15/arch/arm64/kvm/
H A Dpmu-emul.c134 counter = __vcpu_sys_reg(vcpu, reg); in kvm_pmu_get_pmc_value()
181 __vcpu_sys_reg(vcpu, reg) = val; in kvm_pmu_set_pmc_value()
242 __vcpu_sys_reg(vcpu, reg) = val; in kvm_pmu_stop_counter()
375 u64 reg = __vcpu_sys_reg(vcpu, PMOVSSET_EL0); in kvm_pmu_overflow_status()
377 reg &= __vcpu_sys_reg(vcpu, PMINTENSET_EL1); in kvm_pmu_overflow_status()
490 mask &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0); in kvm_pmu_counter_increment()
513 __vcpu_sys_reg(vcpu, PMOVSSET_EL0) |= BIT(i); in kvm_pmu_counter_increment()
659 u64 mdcr = __vcpu_sys_reg(vcpu, MDCR_EL2); in kvm_pmc_counts_at_el2()
919 __vcpu_sys_reg(vcpu, PMOVSSET_EL0) &= mask; in kvm_vcpu_reload_pmu()
1262 u64 pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0); in kvm_vcpu_read_pmcr()
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H A Dpauth.c40 mod = __vcpu_sys_reg(vcpu, SP_EL2); in compute_pac()
170 ikey.lo = __vcpu_sys_reg(vcpu, APIBKEYLO_EL1); in kvm_auth_eretax()
171 ikey.hi = __vcpu_sys_reg(vcpu, APIBKEYHI_EL1); in kvm_auth_eretax()
176 ikey.lo = __vcpu_sys_reg(vcpu, APIAKEYLO_EL1); in kvm_auth_eretax()
177 ikey.hi = __vcpu_sys_reg(vcpu, APIAKEYHI_EL1); in kvm_auth_eretax()
H A Darch_timer.c73 return __vcpu_sys_reg(vcpu, CNTV_CTL_EL0); in timer_get_ctl()
75 return __vcpu_sys_reg(vcpu, CNTP_CTL_EL0); in timer_get_ctl()
77 return __vcpu_sys_reg(vcpu, CNTHV_CTL_EL2); in timer_get_ctl()
79 return __vcpu_sys_reg(vcpu, CNTHP_CTL_EL2); in timer_get_ctl()
92 return __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0); in timer_get_cval()
94 return __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0); in timer_get_cval()
111 __vcpu_sys_reg(vcpu, CNTV_CTL_EL0) = ctl; in timer_set_ctl()
114 __vcpu_sys_reg(vcpu, CNTP_CTL_EL0) = ctl; in timer_set_ctl()
117 __vcpu_sys_reg(vcpu, CNTHV_CTL_EL2) = ctl; in timer_set_ctl()
120 __vcpu_sys_reg(vcpu, CNTHP_CTL_EL2) = ctl; in timer_set_ctl()
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H A Dsys_regs.c211 return __vcpu_sys_reg(vcpu, reg); in vcpu_read_sys_reg()
231 __vcpu_sys_reg(vcpu, reg) = val; in vcpu_write_sys_reg()
266 __vcpu_sys_reg(vcpu, reg) = val; in vcpu_write_sys_reg()
608 __vcpu_sys_reg(vcpu, rd->reg) = val; in set_oslsr_el1()
796 return __vcpu_sys_reg(vcpu, r->reg); in reset_pmu_reg()
804 return __vcpu_sys_reg(vcpu, r->reg); in reset_pmevcntr()
816 return __vcpu_sys_reg(vcpu, r->reg); in reset_pmevtyper()
824 return __vcpu_sys_reg(vcpu, r->reg); in reset_pmselr()
838 __vcpu_sys_reg(vcpu, r->reg) = pmcr; in reset_pmcr()
840 return __vcpu_sys_reg(vcpu, r->reg); in reset_pmcr()
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H A Dfpsimd.c106 fp_state.svcr = &__vcpu_sys_reg(vcpu, SVCR); in kvm_arch_vcpu_ctxsync_fp()
107 fp_state.fpmr = &__vcpu_sys_reg(vcpu, FPMR); in kvm_arch_vcpu_ctxsync_fp()
H A Dsys_regs.h140 __vcpu_sys_reg(vcpu, r->reg) = 0x1de7ec7edbadc0deULL; in reset_unknown()
141 return __vcpu_sys_reg(vcpu, r->reg); in reset_unknown()
148 __vcpu_sys_reg(vcpu, r->reg) = r->val; in reset_val()
149 return __vcpu_sys_reg(vcpu, r->reg); in reset_val()
H A Ddebug.c219 __vcpu_sys_reg(vcpu, OSLSR_EL1) |= OSLSR_EL1_OSLK; in kvm_debug_handle_oslar()
221 __vcpu_sys_reg(vcpu, OSLSR_EL1) &= ~OSLSR_EL1_OSLK; in kvm_debug_handle_oslar()
H A Dat.c113 return (__vcpu_sys_reg(vcpu, HCRX_EL2) & HCRX_EL2_TCR2En) && in s1pie_enabled()
114 (__vcpu_sys_reg(vcpu, TCR2_EL1) & TCR2_EL1_PIE); in s1pie_enabled()
137 if (__vcpu_sys_reg(vcpu, HCRX_EL2) & HCRX_EL2_TCR2En) { in compute_s1poe()
142 val = __vcpu_sys_reg(vcpu, TCR2_EL1); in compute_s1poe()
155 hcr = __vcpu_sys_reg(vcpu, HCR_EL2); in setup_s1_walk()
714 if (__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_FWB) { in compute_par_s12()
768 if ((__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_CD) && in compute_par_s12()
798 (__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_DC)) { in compute_par_s1()
904 wxn = (__vcpu_sys_reg(vcpu, SCTLR_EL1) & SCTLR_ELx_WXN); in compute_s1_direct_permissions()
H A Demulate-nested.c483 u64 val = __vcpu_sys_reg(vcpu, CNTHCTL_EL2); in get_sanitized_cnthctl()
511 val = __vcpu_sys_reg(vcpu, HCR_EL2); in is_nested_nv2_guest()
535 u64 val = __vcpu_sys_reg(vcpu, CPTR_EL2); in check_cptr_tta()
560 __vcpu_sys_reg(vcpu, PMSELR_EL0)); in check_mdcr_hpmn()
2164 val = __vcpu_sys_reg(vcpu, tb->index); in get_behaviour()
2324 val = __vcpu_sys_reg(vcpu, HFGRTR_EL2); in triage_sysreg_trap()
2326 val = __vcpu_sys_reg(vcpu, HFGWTR_EL2); in triage_sysreg_trap()
2337 val = __vcpu_sys_reg(vcpu, HAFGRTR_EL2); in triage_sysreg_trap()
2341 val = __vcpu_sys_reg(vcpu, HFGITR_EL2); in triage_sysreg_trap()
2349 tmp = __vcpu_sys_reg(vcpu, HCRX_EL2); in triage_sysreg_trap()
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H A Dtrace_arm.h352 __entry->hcr_el2 = __vcpu_sys_reg(vcpu, HCR_EL2);
382 __entry->hcr_el2 = __vcpu_sys_reg(vcpu, HCR_EL2);
H A Dnested.c1323 (void)__vcpu_sys_reg(vcpu, sr); in kvm_init_nv_sysregs()
H A Darm.c521 val = __vcpu_sys_reg(vcpu, HCR_EL2); in vcpu_set_pauth_traps()
/linux-6.15/arch/arm64/kvm/hyp/include/hyp/
H A Dswitch.h48 __vcpu_sys_reg(vcpu, FPEXC32_EL2) = read_sysreg(fpexc32_el2); in __fpsimd_save_fpexc32()
71 hfg = __vcpu_sys_reg(vcpu, reg) & ~__ ## reg ## _RES0; \
361 sve_cond_update_zcr_vq(__vcpu_sys_reg(vcpu, ZCR_EL2), SYS_ZCR_EL2); in __hyp_sve_restore_guest()
363 write_sysreg_el1(__vcpu_sys_reg(vcpu, vcpu_sve_zcr_elx(vcpu)), SYS_ZCR); in __hyp_sve_restore_guest()
387 zcr_el2 = __vcpu_sys_reg(vcpu, ZCR_EL2); in fpsimd_lazy_switch_to_guest()
393 zcr_el1 = __vcpu_sys_reg(vcpu, vcpu_sve_zcr_elx(vcpu)); in fpsimd_lazy_switch_to_guest()
415 __vcpu_sys_reg(vcpu, vcpu_sve_zcr_elx(vcpu)) = zcr_el1; in fpsimd_lazy_switch_to_host()
517 write_sysreg_s(__vcpu_sys_reg(vcpu, FPMR), SYS_FPMR); in kvm_hyp_handle_fpsimd()
521 write_sysreg(__vcpu_sys_reg(vcpu, FPEXC32_EL2), fpexc32_el2); in kvm_hyp_handle_fpsimd()
625 val = __vcpu_sys_reg(vcpu, CNTHCTL_EL2); in kvm_handle_cntxct()
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H A Dsysreg-sr.h310 __vcpu_sys_reg(vcpu, DACR32_EL2) = read_sysreg(dacr32_el2); in __sysreg32_save_state()
311 __vcpu_sys_reg(vcpu, IFSR32_EL2) = read_sysreg(ifsr32_el2); in __sysreg32_save_state()
314 __vcpu_sys_reg(vcpu, DBGVCR32_EL2) = read_sysreg(dbgvcr32_el2); in __sysreg32_save_state()
327 write_sysreg(__vcpu_sys_reg(vcpu, DACR32_EL2), dacr32_el2); in __sysreg32_restore_state()
328 write_sysreg(__vcpu_sys_reg(vcpu, IFSR32_EL2), ifsr32_el2); in __sysreg32_restore_state()
331 write_sysreg(__vcpu_sys_reg(vcpu, DBGVCR32_EL2), dbgvcr32_el2); in __sysreg32_restore_state()
/linux-6.15/arch/arm64/kvm/hyp/
H A Dexception.c32 return __vcpu_sys_reg(vcpu, reg); in __vcpu_read_sys_reg()
40 __vcpu_sys_reg(vcpu, reg) = val; in __vcpu_write_sys_reg()
54 __vcpu_sys_reg(vcpu, SPSR_EL1) = val; in __vcpu_write_spsr()
H A Dvgic-v3-sr.c1056 ich_hcr = __vcpu_sys_reg(vcpu, ICH_HCR_EL2); in __vgic_v3_check_trap_forwarding()
1061 (__vcpu_sys_reg(vcpu, HFGRTR_EL2) & HFGxTR_EL2_ICC_IGRPENn_EL1)) in __vgic_v3_check_trap_forwarding()
1065 (__vcpu_sys_reg(vcpu, HFGWTR_EL2) & HFGxTR_EL2_ICC_IGRPENn_EL1)) in __vgic_v3_check_trap_forwarding()
1082 (__vcpu_sys_reg(vcpu, HFGRTR_EL2) & HFGxTR_EL2_ICC_IGRPENn_EL1)) in __vgic_v3_check_trap_forwarding()
1086 (__vcpu_sys_reg(vcpu, HFGWTR_EL2) & HFGxTR_EL2_ICC_IGRPENn_EL1)) in __vgic_v3_check_trap_forwarding()
/linux-6.15/arch/arm64/include/asm/
H A Dkvm_emulate.h190 (__vcpu_sys_reg(vcpu, HCR_EL2) & HCR_E2H)); in vcpu_el2_e2h_is_set()
206 hcr = __vcpu_sys_reg(vcpu, HCR_EL2); in is_hyp_ctxt()
282 u64 hcr_el2 = __vcpu_sys_reg(vcpu, HCR_EL2); in guest_hyp_wfx_traps_enabled()
464 return __vcpu_sys_reg(vcpu, MPIDR_EL1) & MPIDR_HWID_BITMASK; in kvm_vcpu_get_mpidr_aff()
632 u64 cptr = __vcpu_sys_reg(vcpu, CPTR_EL2); in vcpu_sanitised_cptr_el2()
H A Dkvm_host.h1053 #define __vcpu_sys_reg(v,r) \ macro
1385 (!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & OSLSR_EL1_OSLK))
/linux-6.15/arch/arm64/kvm/hyp/nvhe/
H A Dhyp-main.c29 __vcpu_sys_reg(vcpu, ZCR_EL1) = read_sysreg_el1(SYS_ZCR); in __hyp_sve_save_guest()
82 __vcpu_sys_reg(vcpu, FPMR) = read_sysreg_s(SYS_FPMR); in fpsimd_sve_sync()