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Searched refs:__riscv_v_vstate_or (Results 1 – 1 of 1) sorted by relevance

/linux-6.15/arch/riscv/include/asm/
H A Dvector.h25 #define __riscv_v_vstate_or(_val, TYPE) ({ \ macro
84 regs->status = __riscv_v_vstate_or(regs->status, CLEAN); in __riscv_v_vstate_clean()
89 regs->status = __riscv_v_vstate_or(regs->status, DIRTY); in __riscv_v_vstate_dirty()
94 regs->status = __riscv_v_vstate_or(regs->status, OFF); in riscv_v_vstate_off()
99 regs->status = __riscv_v_vstate_or(regs->status, INITIAL); in riscv_v_vstate_on()