Searched refs:XIIC_INTR_TX_HALF_MASK (Results 1 – 1 of 1) sorted by relevance
194 #define XIIC_INTR_TX_HALF_MASK 0x80 /* 1 = TX FIFO half empty */ macro204 (XIIC_INTR_TX_ERROR_MASK | XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_HALF_MASK)824 if (pend & (XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_HALF_MASK)) { in xiic_process()828 (XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_HALF_MASK)); in xiic_process()851 xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK); in xiic_process()965 xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK | XIIC_INTR_TX_EMPTY_MASK); in xiic_start_recv()1120 xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK); in xiic_send_rem_atomic()1154 XIIC_INTR_TX_HALF_MASK : 0)); in xiic_start_send()