Searched refs:XGMAC_RX_CONFIG (Results 1 – 3 of 3) sorted by relevance
23 rx = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_core_init()47 writel(rx, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_core_init()54 u32 rx = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac()65 writel(rx, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac()73 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_rx_ipc()78 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_rx_ipc()389 writel(cfg, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_pmt()564 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_mac_loopback()1137 writel(val, ioaddr + XGMAC_RX_CONFIG); in dwxgmac3_rxp_config()1499 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_set_arp_offload()[all …]
320 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_dma_start_rx()322 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_dma_start_rx()578 u32 value = readl(ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_enable_sph()582 writel(value, ioaddr + XGMAC_RX_CONFIG); in dwxgmac2_enable_sph()
31 #define XGMAC_RX_CONFIG 0x00000004 macro