Home
last modified time | relevance | path

Searched refs:XAXIDMA_TX_CR_OFFSET (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/drivers/net/ethernet/ni/
H A Dnixge.c25 #define XAXIDMA_TX_CR_OFFSET 0x00 /* Channel control */ macro
357 cr = nixge_dma_read_reg(priv, XAXIDMA_TX_CR_OFFSET); in nixge_hw_dma_bd_init()
367 nixge_dma_write_reg(priv, XAXIDMA_TX_CR_OFFSET, cr); in nixge_hw_dma_bd_init()
385 nixge_dma_write_reg(priv, XAXIDMA_TX_CR_OFFSET, in nixge_hw_dma_bd_init()
416 __nixge_device_reset(priv, XAXIDMA_TX_CR_OFFSET); in nixge_device_reset()
797 __nixge_device_reset(lp, XAXIDMA_TX_CR_OFFSET); in nixge_dma_err_handler()
834 cr = nixge_dma_read_reg(lp, XAXIDMA_TX_CR_OFFSET); in nixge_dma_err_handler()
844 nixge_dma_write_reg(lp, XAXIDMA_TX_CR_OFFSET, cr); in nixge_dma_err_handler()
861 cr = nixge_dma_read_reg(lp, XAXIDMA_TX_CR_OFFSET); in nixge_dma_err_handler()
862 nixge_dma_write_reg(lp, XAXIDMA_TX_CR_OFFSET, in nixge_dma_err_handler()
[all …]
/linux-6.15/drivers/net/ethernet/xilinx/
H A Dxilinx_axienet_main.c311 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp->tx_dma_cr); in axienet_dma_start()
319 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp->tx_dma_cr); in axienet_dma_start()
607 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, XAXIDMA_CR_RESET_MASK); in __axienet_device_reset()
611 XAXIDMA_TX_CR_OFFSET); in __axienet_device_reset()
670 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); in axienet_dma_stop()
1024 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp->tx_dma_cr); in axienet_tx_poll()
1350 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); in axienet_tx_irq()
1979 data[32] = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET); in axienet_ethtools_get_regs()
2139 u32 reg = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET); in axienet_update_coalesce_tx()
2146 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); in axienet_update_coalesce_tx()
H A Dxilinx_axienet.h76 #define XAXIDMA_TX_CR_OFFSET 0x00000000 /* Channel control */ macro