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Searched refs:XAXIDMA_RX_CR_OFFSET (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/drivers/net/ethernet/ni/
H A Dnixge.c30 #define XAXIDMA_RX_CR_OFFSET 0x30 /* Channel control */ macro
344 cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET); in nixge_hw_dma_bd_init()
354 nixge_dma_write_reg(priv, XAXIDMA_RX_CR_OFFSET, cr); in nixge_hw_dma_bd_init()
374 nixge_dma_write_reg(priv, XAXIDMA_RX_CR_OFFSET, in nixge_hw_dma_bd_init()
417 __nixge_device_reset(priv, XAXIDMA_RX_CR_OFFSET); in nixge_device_reset()
798 __nixge_device_reset(lp, XAXIDMA_RX_CR_OFFSET); in nixge_dma_err_handler()
821 cr = nixge_dma_read_reg(lp, XAXIDMA_RX_CR_OFFSET); in nixge_dma_err_handler()
831 nixge_dma_write_reg(lp, XAXIDMA_RX_CR_OFFSET, cr); in nixge_dma_err_handler()
850 cr = nixge_dma_read_reg(lp, XAXIDMA_RX_CR_OFFSET); in nixge_dma_err_handler()
851 nixge_dma_write_reg(lp, XAXIDMA_RX_CR_OFFSET, in nixge_dma_err_handler()
[all …]
/linux-6.15/drivers/net/ethernet/xilinx/
H A Dxilinx_axienet_main.c294 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp->rx_dma_cr); in axienet_dma_start()
301 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp->rx_dma_cr); in axienet_dma_start()
661 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_dma_stop()
1305 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp->rx_dma_cr); in axienet_rx_poll()
1399 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_rx_irq()
1983 data[36] = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_ethtools_get_regs()
2086 u32 reg = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_update_coalesce_rx()
2093 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_update_coalesce_rx()
H A Dxilinx_axienet.h81 #define XAXIDMA_RX_CR_OFFSET 0x00000030 /* Channel control */ macro