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Searched refs:WREG32_SDMA (Results 1 – 2 of 2) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v4_4_2.c99 #define WREG32_SDMA(instance, offset, value) \ macro
289 WREG32_SDMA(ring->me, regSDMA_GFX_RB_WPTR, in sdma_v4_4_2_ring_set_wptr()
607 WREG32_SDMA(i, regSDMA_CNTL, f32_cntl); in sdma_v4_4_2_inst_ctx_switch_enable()
728 WREG32_SDMA(i, regSDMA_GFX_RB_RPTR, 0); in sdma_v4_4_2_gfx_resume()
730 WREG32_SDMA(i, regSDMA_GFX_RB_WPTR, 0); in sdma_v4_4_2_gfx_resume()
816 WREG32_SDMA(i, regSDMA_PAGE_RB_RPTR, 0); in sdma_v4_4_2_page_resume()
818 WREG32_SDMA(i, regSDMA_PAGE_RB_WPTR, 0); in sdma_v4_4_2_page_resume()
936 WREG32_SDMA(i, regSDMA_UCODE_ADDR, 0); in sdma_v4_4_2_inst_load_microcode()
939 WREG32_SDMA(i, regSDMA_UCODE_DATA, in sdma_v4_4_2_inst_load_microcode()
942 WREG32_SDMA(i, regSDMA_UCODE_ADDR, in sdma_v4_4_2_inst_load_microcode()
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H A Dsdma_v4_0.c607 WREG32_SDMA(i, mmSDMA0_ULV_CNTL, temp); in sdma_v4_0_setup_ulv()
1019 WREG32_SDMA(i, mmSDMA0_CNTL, f32_cntl); in sdma_v4_0_ctx_switch_enable()
1102 WREG32_SDMA(i, mmSDMA0_GFX_RB_RPTR, 0); in sdma_v4_0_gfx_resume()
1104 WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR, 0); in sdma_v4_0_gfx_resume()
1187 WREG32_SDMA(i, mmSDMA0_PAGE_RB_RPTR, 0); in sdma_v4_0_page_resume()
1189 WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR, 0); in sdma_v4_0_page_resume()
1361 WREG32_SDMA(i, mmSDMA0_UCODE_ADDR, 0); in sdma_v4_0_load_microcode()
1364 WREG32_SDMA(i, mmSDMA0_UCODE_DATA, in sdma_v4_0_load_microcode()
1367 WREG32_SDMA(i, mmSDMA0_UCODE_ADDR, in sdma_v4_0_load_microcode()
1416 WREG32_SDMA(i, mmSDMA0_CNTL, temp); in sdma_v4_0_start()
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