Searched refs:W5_CMD_ENC_SEQ_DEPENDENT_SLICE (Results 1 – 2 of 2) sorted by relevance
548 #define W5_CMD_ENC_SEQ_DEPENDENT_SLICE (W5_REG_BASE + 0x144) macro
1869 vpu_write_reg(inst->dev, W5_CMD_ENC_SEQ_DEPENDENT_SLICE, in wave5_vpu_enc_init_seq()