| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_mode_vba_32.c | 366 mode_lib->vba.OutputBppPerState[mode_lib->vba.VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 538 mode_lib->vba.VoltageLevel, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 613 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 617 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 618 dml_max(v->WritebackDelay[mode_lib->vba.VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 637 v->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 638 v->WritebackDelay[mode_lib->vba.VoltageLevel][j]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 711 k, v->WritebackDelay[mode_lib->vba.VoltageLevel][k]); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1193 v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1446 dml_ceil(v->WritebackDelay[mode_lib->vba.VoltageLevel][k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() [all …]
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| H A D | display_mode_vba_util_32.h | 691 const int VoltageLevel, 698 const int VoltageLevel,
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| H A D | dcn32_fpu.c | 478 unsigned int vlevel = context->bw_ctx.dml.vba.VoltageLevel; in dcn32_set_phantom_stream_timing() 520 num_dpp = vba->NoOfDPP[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]]; in dcn32_set_phantom_stream_timing() 635 …(vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_pla… in dcn32_assign_subvp_pipe() 636 …(vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_pla… in dcn32_assign_subvp_pipe() 1416 context->bw_ctx.dml.vba.VoltageLevel = *vlevel; in try_odm_power_optimization_and_revalidate() 1470 vba->VoltageLevel = *vlevel; in dcn32_full_validate_bw_helper() 1568 vba->VoltageLevel = *vlevel; in dcn32_full_validate_bw_helper() 1583 vba->VoltageLevel = *vlevel; in dcn32_full_validate_bw_helper() 1731 …if (vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_… in dcn32_calculate_dlg_params() 2207 vba->VoltageLevel = vlevel; in dcn32_internal_validate_bw() [all …]
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| H A D | display_mode_vba_util_32.c | 3284 const int VoltageLevel, in dml32_get_return_bw_mbps() argument 3296 IdealDRAMBandwidth * (VoltageLevel < 2 ? soc->pct_ideal_dram_bw_after_urgent_strobe : in dml32_get_return_bw_mbps() 3300 IdealDRAMBandwidth * (VoltageLevel < 2 ? soc->pct_ideal_dram_bw_after_urgent_strobe : in dml32_get_return_bw_mbps() 3309 dml_print("DML::%s: VoltageLevel = %d\n", __func__, VoltageLevel); in dml32_get_return_bw_mbps() 3327 const int VoltageLevel, in dml32_get_return_bw_mbps_vm_only() argument 3337 * (VoltageLevel < 2 ? in dml32_get_return_bw_mbps_vm_only() 3341 dml_print("DML::%s: VoltageLevel = %d\n", __func__, VoltageLevel); in dml32_get_return_bw_mbps_vm_only()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_mode_vba_20.c | 1979 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1992 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1996 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1998 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2018 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2019 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][j]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2028 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 5075 mode_lib->vba.VoltageLevel = mode_lib->vba.soc.num_states + 1; in dml20_ModeSupportAndSystemConfigurationFull() 5078 mode_lib->vba.VoltageLevel = i; in dml20_ModeSupportAndSystemConfigurationFull() 5111 locals->RequiresDSC[mode_lib->vba.VoltageLevel][k]; in dml20_ModeSupportAndSystemConfigurationFull() [all …]
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| H A D | display_mode_vba_20v2.c | 2015 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2028 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2032 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2034 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2054 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] = in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2055 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][j]; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2064 mode_lib->vba.WritebackDelay[mode_lib->vba.VoltageLevel][k] in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 5191 mode_lib->vba.VoltageLevel = mode_lib->vba.soc.num_states + 1; in dml20v2_ModeSupportAndSystemConfigurationFull() 5194 mode_lib->vba.VoltageLevel = i; in dml20v2_ModeSupportAndSystemConfigurationFull() 5227 locals->RequiresDSC[mode_lib->vba.VoltageLevel][k]; in dml20v2_ModeSupportAndSystemConfigurationFull() [all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.c | 79 return mode_lib->vba.VoltageLevel; in dml_get_voltage_level() 377 if (soc->clock_limits[i].state == mode_lib->vba.VoltageLevel) in fetch_socbb_params() 1083 mode_lib->vba.VoltageLevel = mode_lib->vba.cache_pipes[0].clks_cfg.voltage; in ModeSupportAndSystemConfiguration() 1084 …mode_lib->vba.ReturnBW = mode_lib->vba.ReturnBWPerState[mode_lib->vba.VoltageLevel][mode_lib->vba.… in ModeSupportAndSystemConfiguration() 1086 mode_lib->vba.ReturnBW = mode_lib->vba.ReturnBWPerState[mode_lib->vba.VoltageLevel][0]; in ModeSupportAndSystemConfiguration() 1087 ….FabricAndDRAMBandwidth = mode_lib->vba.FabricAndDRAMBandwidthPerState[mode_lib->vba.VoltageLevel]; in ModeSupportAndSystemConfiguration() 1098 mode_lib->vba.DISPCLK = soc->clock_limits[mode_lib->vba.VoltageLevel].dispclk_mhz; in ModeSupportAndSystemConfiguration() 1112 mode_lib->vba.DPPCLK[k] = soc->clock_limits[mode_lib->vba.VoltageLevel].dppclk_mhz; in ModeSupportAndSystemConfiguration()
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| H A D | display_mode_vba.h | 433 int VoltageLevel; member
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_mode_vba_21.c | 2041 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2054 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2058 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2060 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2080 locals->WritebackDelay[mode_lib->vba.VoltageLevel][k] = in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2081 locals->WritebackDelay[mode_lib->vba.VoltageLevel][j]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 5193 mode_lib->vba.VoltageLevel = mode_lib->vba.soc.num_states + 1; in dml21_ModeSupportAndSystemConfigurationFull() 5196 mode_lib->vba.VoltageLevel = i; in dml21_ModeSupportAndSystemConfigurationFull() 5228 locals->ODMCombineEnablePerState[mode_lib->vba.VoltageLevel][k]; in dml21_ModeSupportAndSystemConfigurationFull() 5233 locals->RequiresDSC[mode_lib->vba.VoltageLevel][k]; in dml21_ModeSupportAndSystemConfigurationFull() [all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_mode_vba_30.c | 2121 double BPP = v->OutputBppPerState[k][v->VoltageLevel]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2350 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackLatency + in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2360 v->WritebackDelay[v->VoltageLevel][k] = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2364 v->WritebackDelay[v->VoltageLevel][k] = dml_max(v->WritebackDelay[v->VoltageLevel][k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2382 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackDelay[v->VoltageLevel][j]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 5155 v->VoltageLevel = i; in dml30_ModeSupportAndSystemConfigurationFull() 5169 v->DCFCLK = v->DCFCLKState[v->VoltageLevel][MaximumMPCCombine]; in dml30_ModeSupportAndSystemConfigurationFull() 5170 v->DRAMSpeed = v->DRAMSpeedPerState[v->VoltageLevel]; in dml30_ModeSupportAndSystemConfigurationFull() 5171 v->FabricClock = v->FabricClockPerState[v->VoltageLevel]; in dml30_ModeSupportAndSystemConfigurationFull() 5172 v->SOCCLK = v->SOCCLKPerState[v->VoltageLevel]; in dml30_ModeSupportAndSystemConfigurationFull() [all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_mode_vba_31.c | 2503 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackLatency 2514 v->WritebackDelay[v->VoltageLevel][k] = 0; 2517 v->WritebackDelay[v->VoltageLevel][k] = dml_max( 2518 v->WritebackDelay[v->VoltageLevel][k], 2537 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackDelay[v->VoltageLevel][j]; 2547 (double) v->WritebackDelay[v->VoltageLevel][k] 5519 v->VoltageLevel = i; 5533 v->DCFCLK = v->DCFCLKState[v->VoltageLevel][MaximumMPCCombine]; 5534 v->DRAMSpeed = v->DRAMSpeedPerState[v->VoltageLevel]; 5535 v->FabricClock = v->FabricClockPerState[v->VoltageLevel]; [all …]
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| H A D | dcn31_fpu.c | 471 …if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[context->bw_ctx.dml.vba.VoltageLevel][context->… in dcn315_update_soc_for_wm_a()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_mode_vba_314.c | 2522 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackLatency 2533 v->WritebackDelay[v->VoltageLevel][k] = 0; 2536 v->WritebackDelay[v->VoltageLevel][k] = dml_max( 2537 v->WritebackDelay[v->VoltageLevel][k], 2556 v->WritebackDelay[v->VoltageLevel][k] = v->WritebackDelay[v->VoltageLevel][j]; 2569 v->WritebackDelay[v->VoltageLevel][k]); 5613 v->VoltageLevel = i; 5627 v->DCFCLK = v->DCFCLKState[v->VoltageLevel][MaximumMPCCombine]; 5628 v->DRAMSpeed = v->DRAMSpeedPerState[v->VoltageLevel]; 5629 v->FabricClock = v->FabricClockPerState[v->VoltageLevel]; [all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | dml2_mall_phantom.c | 257 …vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plan… in assign_subvp_pipe()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 1646 context->bw_ctx.dml.vba.VoltageLevel = 0; in dcn30_internal_validate_bw() 1869 context->bw_ctx.dml.vba.VoltageLevel = vlevel; in dcn30_internal_validate_bw()
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| /linux-6.15/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_hw_sequencer.c | 616 if (vba->DRAMClockChangeSupport[vba->VoltageLevel][vba->maxMpcComb] != in set_p_state_switch_method()
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