Home
last modified time | relevance | path

Searched refs:VIVS_HI_CLOCK_CONTROL (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/drivers/gpu/drm/etnaviv/
H A Detnaviv_perfmon.c54 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock); in pipe_select()
61 u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); in pipe_perf_reg_read()
82 u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); in pipe_reg_read()
H A Detnaviv_gpu.c501 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock | in etnaviv_gpu_load_clock()
503 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock); in etnaviv_gpu_load_clock()
516 u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); in etnaviv_gpu_update_clock()
560 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset()
568 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset()
576 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset()
580 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset()
592 control = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); in etnaviv_hw_reset()
603 gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); in etnaviv_hw_reset()
611 control = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL); in etnaviv_hw_reset()
H A Detnaviv_dump.c29 VIVS_HI_CLOCK_CONTROL,
H A Dstate_hi.xml.h56 #define VIVS_HI_CLOCK_CONTROL 0x00000000 macro