Searched refs:VIDEO_DIP_CTL (Results 1 – 2 of 2) sorted by relevance
216 u32 val = intel_de_read(display, VIDEO_DIP_CTL); in g4x_write_infoframe()227 intel_de_write(display, VIDEO_DIP_CTL, val); in g4x_write_infoframe()241 intel_de_write(display, VIDEO_DIP_CTL, val); in g4x_write_infoframe()242 intel_de_posting_read(display, VIDEO_DIP_CTL); in g4x_write_infoframe()254 intel_de_rmw(display, VIDEO_DIP_CTL, in g4x_read_infoframe()265 u32 val = intel_de_read(display, VIDEO_DIP_CTL); in g4x_infoframes_enabled()871 i915_reg_t reg = VIDEO_DIP_CTL; in g4x_set_infoframes()
1350 #define VIDEO_DIP_CTL _MMIO(0x61170) macro