Searched refs:VCN_DPG_STATE__PAUSE (Results 1 – 10 of 10) sorted by relevance
1289 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v1_0_pause_dpg_mode()1345 if (new_state->jpeg == VCN_DPG_STATE__PAUSE) { in vcn_v1_0_pause_dpg_mode()1863 new_state.fw_based = VCN_DPG_STATE__PAUSE; in vcn_v1_0_idle_work_handler()1868 new_state.jpeg = VCN_DPG_STATE__PAUSE; in vcn_v1_0_idle_work_handler()1925 new_state.fw_based = VCN_DPG_STATE__PAUSE; in vcn_v1_0_set_pg_for_begin_use()1930 new_state.jpeg = VCN_DPG_STATE__PAUSE; in vcn_v1_0_set_pg_for_begin_use()1935 new_state.fw_based = VCN_DPG_STATE__PAUSE; in vcn_v1_0_set_pg_for_begin_use()1937 new_state.jpeg = VCN_DPG_STATE__PAUSE; in vcn_v1_0_set_pg_for_begin_use()
429 new_state.fw_based = VCN_DPG_STATE__PAUSE; in amdgpu_vcn_idle_work_handler()493 new_state.fw_based = VCN_DPG_STATE__PAUSE; in amdgpu_vcn_ring_begin_use()502 new_state.fw_based = VCN_DPG_STATE__PAUSE; in amdgpu_vcn_ring_begin_use()
267 VCN_DPG_STATE__PAUSE, enumerator
530 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v5_0_1_pause_dpg_mode()567 struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__PAUSE}; in vcn_v5_0_1_start_dpg_mode()
136 new_state.fw_based = VCN_DPG_STATE__PAUSE; in vcn_v2_5_idle_work_handler()204 new_state.fw_based = VCN_DPG_STATE__PAUSE; in vcn_v2_5_ring_begin_use()213 new_state.fw_based = VCN_DPG_STATE__PAUSE; in vcn_v2_5_ring_begin_use()1661 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v2_5_pause_dpg_mode()
1091 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v5_0_0_pause_dpg_mode()
1359 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v4_0_5_pause_dpg_mode()
1274 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v2_0_pause_dpg_mode()
1699 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v4_0_pause_dpg_mode()
1701 if (new_state->fw_based == VCN_DPG_STATE__PAUSE) { in vcn_v3_0_pause_dpg_mode()