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Searched refs:TXD (Results 1 – 25 of 26) sorted by relevance

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/linux-6.15/arch/arm/boot/dts/st/
H A Dste-dbx5x0-pinctrl.dtsi21 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
36 pins = "GPIO3_AH3"; /* TXD */
53 pins = "GPIO5_AG6"; /* TXD */
64 pins = "GPIO5_AG6"; /* TXD */
107 pins = "GPIO30_W3"; /* TXD */
118 pins = "GPIO30_W3"; /* TXD */
596 "GPIO12_AC4", /* TXD */
634 "GPIO193_AH27", /* TXD */
H A Dste-href-family-pinctrl.dtsi28 "GPIO215_AH13", /* TXD */
45 pins = "GPIO215_AH13"; /* TXD */
62 pins = "GPIO215_AH13"; /* TXD */
H A Dste-snowball.dts574 "GPIO146_D13", /* TXD */
/linux-6.15/arch/arm64/boot/dts/renesas/
H A Drzg3s-smarc.dtsi164 <RZG2L_PORT_PINMUX(6, 4, 1)>; /* TXD */
169 <RZG2L_PORT_PINMUX(17, 3, 7)>; /* TXD */
207 <RZG2L_PORT_PINMUX(18, 4, 8)>, /* TXD */
H A Drzg2l-smarc-pinfunction.dtsi142 <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
149 <RZG2L_PORT_PINMUX(46, 2, 1)>; /* TXD */
H A Dr9a08g045s33-smarc-pmod1-type-3a.dtso34 pinmux = <RZG2L_PORT_PINMUX(14, 0, 1)>, /* TXD */
H A Drzg2ul-smarc-pinfunction.dtsi118 <RZG2L_PORT_PINMUX(3, 2, 2)>, /* TXD */
H A Drzg2lc-smarc-pinfunction.dtsi128 <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
/linux-6.15/arch/arm/boot/dts/microchip/
H A Dsama5d4.dtsi1360 AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1369 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE /* TXD */
1378 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
1393 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
1408 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD - conflicts with G0_COL, PCK2 */
1423 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1432 AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
H A Dlan966x-kontron-kswitch-d10-mmt.dtsi98 /* RXD, TXD */
H A Dlan966x-pcb8309.dts136 /* RXD, TXD */
H A Dat91-tse850-3.dts325 /* 28 */ "RXD", "TXD", "BRX", "BTX";
/linux-6.15/drivers/misc/
H A Dlan966x_pci.dtso103 /* RXD, TXD */
/linux-6.15/drivers/mtd/nand/raw/
H A Dmxic_nand.c63 #define TXD(x) (0x14 + ((x) * 4)) macro
361 writel(data, nfc->regs + TXD(nbytes % 4)); in mxic_nfc_data_xfer()
/linux-6.15/drivers/mailbox/
H A Dbcm-pdc-mailbox.c70 #define TXD(x, max_mask) XXD((x), (max_mask)) macro
72 #define NEXTTXD(i, max_mask) TXD((i) + 1, (max_mask))
73 #define PREVTXD(i, max_mask) TXD((i) - 1, (max_mask))
76 #define NTXDACTIVE(h, t, max_mask) TXD((t) - (h), (max_mask))
/linux-6.15/Documentation/devicetree/bindings/iio/addac/
H A Dadi,ad74115.yaml296 3 - Control HART TXD
297 4 - Monitor HART TXD
/linux-6.15/Documentation/devicetree/bindings/net/
H A Drockchip-dwmac.yaml106 description: Delay value for TXD timing.
H A Dxlnx,axi-ethernet.yaml98 - description: AXI4-Stream clock for TXD RXD TXC and RXS interfaces.
/linux-6.15/arch/arm/boot/dts/renesas/
H A Dr7s9210-rza2mevb.dts15 * - TXD = CN17-10,
/linux-6.15/Documentation/arch/arm/pxa/
H A Dmfp.rst32 | SSP2 |---(TXD)----+ | | +---------+
40 | UART2 |---(TXD)--------+
/linux-6.15/drivers/spi/
H A Dspi-mxic.c64 #define TXD(x) (0x14 + ((x) * 4)) macro
370 writel(data, mxic->regs + TXD(nbytes % 4)); in mxic_spi_data_xfer()
/linux-6.15/arch/arm/boot/dts/gemini/
H A Dgemini-dlink-dir-685.dts43 /* Collides with LPC LFRAME, UART RTS, SSP TXD */
/linux-6.15/arch/arm64/boot/dts/rockchip/
H A Drk3326-odroid-go.dtsi539 /* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */
/linux-6.15/arch/arm64/boot/dts/freescale/
H A Dimx8x-colibri.dtsi645 /* Colibri optional CAN on UART_A TXD/RXD */
/linux-6.15/Documentation/networking/
H A Dphy.rst87 for the transmit data lines (TXD[3:0]) processed by the PHY device

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