Searched refs:TSI148_LCSR_OT (Results 1 – 2 of 2) sorted by relevance
889 temp_ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()892 iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()992 iowrite32be(pci_base_high, bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()994 iowrite32be(pci_base_low, bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()998 iowrite32be(pci_bound_low, bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()1006 iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()1012 iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_set()1048 ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] + in __tsi148_master_get()1053 pci_base_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] + in __tsi148_master_get()1366 pci_addr_low = ioread32be(bridge->base + TSI148_LCSR_OT[i] + in tsi148_master_rmw()[all …]
193 static const int TSI148_LCSR_OT[8] = { TSI148_LCSR_OT0, TSI148_LCSR_OT1, variable