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Searched refs:TRANSCONF (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/gvt/
H A Ddisplay.c74 if (!(vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_EDP)) & TRANSCONF_ENABLE)) in edp_pipe_is_enabled()
91 if (vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) & TRANSCONF_ENABLE) in pipe_is_enabled()
200 vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) &= in emulate_monitor_status_change()
261 vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_A)) |= TRANSCONF_ENABLE; in emulate_monitor_status_change()
262 vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_A)) |= TRANSCONF_STATE_ENABLE; in emulate_monitor_status_change()
522 vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_A)) |= TRANSCONF_ENABLE; in emulate_monitor_status_change()
H A Dhandlers.c2288 MMIO_DH(TRANSCONF(display, TRANSCODER_A), D_ALL, NULL, in init_generic_mmio_info()
2290 MMIO_DH(TRANSCONF(display, TRANSCODER_B), D_ALL, NULL, in init_generic_mmio_info()
2292 MMIO_DH(TRANSCONF(display, TRANSCODER_C), D_ALL, NULL, in init_generic_mmio_info()
2294 MMIO_DH(TRANSCONF(display, TRANSCODER_EDP), D_ALL, NULL, in init_generic_mmio_info()
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_pch_display.c281 pipeconf_val = intel_de_read(display, TRANSCONF(display, pipe)); in ilk_enable_pch_transcoder()
425 u32 bpc = (intel_de_read(display, TRANSCONF(display, pipe)) in ilk_pch_enable()
572 TRANSCONF(dev_priv, cpu_transcoder)); in lpt_enable_pch_transcoder()
H A Dintel_crt.c737 TRANSCONF(display, cpu_transcoder)); in intel_crt_load_detect()
739 intel_de_write(display, TRANSCONF(display, cpu_transcoder), in intel_crt_load_detect()
742 TRANSCONF(display, cpu_transcoder)); in intel_crt_load_detect()
753 intel_de_write(display, TRANSCONF(display, cpu_transcoder), in intel_crt_load_detect()
H A Dintel_display.c438 TRANSCONF(display, cpu_transcoder)); in assert_transcoder()
527 val = intel_de_read(display, TRANSCONF(display, cpu_transcoder)); in intel_enable_transcoder()
542 intel_de_write(display, TRANSCONF(display, cpu_transcoder), in intel_enable_transcoder()
544 intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder)); in intel_enable_transcoder()
573 val = intel_de_read(display, TRANSCONF(display, cpu_transcoder)); in intel_disable_transcoder()
593 intel_de_write(display, TRANSCONF(display, cpu_transcoder), val); in intel_disable_transcoder()
3828 TRANSCONF(display, pipe_config->cpu_transcoder)); in hsw_get_transcoder_state()
3930 TRANSCONF(display, pipe_config->cpu_transcoder)); in hsw_get_pipe_config()
8207 intel_de_posting_read(display, TRANSCONF(display, pipe)); in i830_enable_pipe()
8230 intel_de_write(display, TRANSCONF(display, pipe), 0); in i830_disable_pipe()
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H A Dintel_fdi.c1036 temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_pll_enable()
1092 temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_disable()
1118 temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_disable()
H A Dicl_dsi.c1025 intel_de_rmw(display, TRANSCONF(display, dsi_trans), 0, in gen11_dsi_enable_transcoder()
1029 if (intel_de_wait_for_set(display, TRANSCONF(display, dsi_trans), in gen11_dsi_enable_transcoder()
1292 intel_de_rmw(display, TRANSCONF(display, dsi_trans), in gen11_dsi_disable_transcoder()
1296 if (intel_de_wait_for_clear(display, TRANSCONF(display, dsi_trans), in gen11_dsi_disable_transcoder()
1729 tmp = intel_de_read(display, TRANSCONF(display, dsi_trans)); in gen11_dsi_get_hw_state()
H A Dintel_drrs.c90 intel_de_rmw(display, TRANSCONF(display, cpu_transcoder), in intel_drrs_set_refresh_rate_pipeconf()
H A Dintel_display_power_well.c1062 if ((intel_de_read(display, TRANSCONF(display, PIPE_A)) & TRANSCONF_ENABLE) == 0) in i830_pipes_power_well_enable()
1064 if ((intel_de_read(display, TRANSCONF(display, PIPE_B)) & TRANSCONF_ENABLE) == 0) in i830_pipes_power_well_enable()
1078 return intel_de_read(display, TRANSCONF(display, PIPE_A)) & TRANSCONF_ENABLE && in i830_pipes_power_well_enabled()
1079 intel_de_read(display, TRANSCONF(display, PIPE_B)) & TRANSCONF_ENABLE; in i830_pipes_power_well_enabled()
H A Dvlv_dsi.c977 TRANSCONF(dev_priv, PIPE_B)) & TRANSCONF_ENABLE; in intel_dsi_get_hw_state()
/linux-6.15/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c136 MMIO_D(TRANSCONF(dev_priv, TRANSCODER_A)); in iterate_generic_mmio()
137 MMIO_D(TRANSCONF(dev_priv, TRANSCODER_B)); in iterate_generic_mmio()
138 MMIO_D(TRANSCONF(dev_priv, TRANSCODER_C)); in iterate_generic_mmio()
139 MMIO_D(TRANSCONF(dev_priv, TRANSCODER_EDP)); in iterate_generic_mmio()
H A Di915_reg.h1533 #define TRANSCONF(dev_priv, trans) _MMIO_PIPE2(dev_priv, (trans), _TRANSACONF) macro