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Searched refs:TRANSCODER_EDP (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c139 MMIO_D(TRANSCONF(dev_priv, TRANSCODER_EDP)); in iterate_generic_mmio()
264 MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_EDP)); in iterate_generic_mmio()
265 MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_EDP)); in iterate_generic_mmio()
266 MMIO_D(TRANS_HSYNC(dev_priv, TRANSCODER_EDP)); in iterate_generic_mmio()
267 MMIO_D(TRANS_VTOTAL(dev_priv, TRANSCODER_EDP)); in iterate_generic_mmio()
268 MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_EDP)); in iterate_generic_mmio()
269 MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_EDP)); in iterate_generic_mmio()
270 MMIO_D(BCLRPAT(dev_priv, TRANSCODER_EDP)); in iterate_generic_mmio()
296 MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_EDP)); in iterate_generic_mmio()
297 MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_EDP)); in iterate_generic_mmio()
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H A Di915_reg.h2477 [TRANSCODER_EDP] = _CHICKEN_TRANS_EDP, \
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_display_limits.h43 TRANSCODER_EDP, enumerator
H A Dintel_display_device.c144 [TRANSCODER_EDP] = PIPE_EDP_OFFSET, \
150 [TRANSCODER_EDP] = TRANSCODER_EDP_OFFSET, \
581 BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP),
634 BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP),
678 BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP),
828 BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
881 [TRANSCODER_EDP] = PIPE_EDP_OFFSET, \
889 [TRANSCODER_EDP] = TRANSCODER_EDP_OFFSET, \
903 BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
H A Dintel_ddi.c477 if (master_transcoder == TRANSCODER_EDP) in bdw_trans_port_sync_master_select()
547 if (cpu_transcoder == TRANSCODER_EDP) { in intel_ddi_transcoder_func_reg_val_get()
769 cpu_transcoder = TRANSCODER_EDP; in intel_ddi_connector_get_hw_state()
1050 if (cpu_transcoder == TRANSCODER_EDP) in intel_ddi_enable_transcoder_clock()
1069 if (cpu_transcoder == TRANSCODER_EDP) in intel_ddi_disable_transcoder_clock()
3383 [PORT_A] = TRANSCODER_EDP, in gen9_chicken_trans_reg_by_port()
3859 if (cpu_transcoder == TRANSCODER_EDP) in intel_ddi_is_audio_enabled()
3931 return TRANSCODER_EDP; in bdw_transcoder_master_readout()
4430 pipe_config->cpu_transcoder = TRANSCODER_EDP; in intel_ddi_compute_config()
4561 if (port_sync_transcoders & BIT(TRANSCODER_EDP)) in intel_ddi_compute_config_late()
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H A Dintel_display_power.h125 ((tran) == TRANSCODER_EDP ? POWER_DOMAIN_TRANSCODER_EDP : \
H A Dintel_psr_regs.h72 #define _EDP_PSR_TRANS_SHIFT(trans) ((trans) == TRANSCODER_EDP ? \
H A Dintel_pipe_crc.c316 pipe_config->cpu_transcoder == TRANSCODER_EDP) in intel_crtc_crc_setup_workarounds()
H A Dintel_display.h79 case TRANSCODER_EDP: in transcoder_name()
H A Dintel_display.c1639 if (cpu_transcoder != TRANSCODER_EDP) in hsw_configure_cpu_transcoder()
2602 return transcoder == TRANSCODER_EDP; in intel_cpu_transcoder_has_m2_n2()
2720 if (display->platform.haswell && cpu_transcoder == TRANSCODER_EDP && in intel_set_transcoder_timings()
3685 u8 panel_transcoder_mask = BIT(TRANSCODER_EDP); in hsw_panel_transcoders()
3763 return enabled_transcoders & BIT(TRANSCODER_EDP); in has_edp_transcoders()
3774 return enabled_transcoders & ~(BIT(TRANSCODER_EDP) | in has_pipe_transcoders()
3961 if (pipe_config->cpu_transcoder != TRANSCODER_EDP && in hsw_get_pipe_config()
H A Dintel_vdsc.c44 if (cpu_transcoder == TRANSCODER_EDP || in is_pipe_dsc()
H A Dintel_backlight.c543 if (cpu_transcoder == TRANSCODER_EDP) in pch_enable_backlight()
H A Dintel_psr.c1113 return cpu_transcoder == TRANSCODER_EDP; in transcoder_has_psr2()
/linux-6.15/drivers/gpu/drm/i915/gvt/
H A Ddisplay.c74 if (!(vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_EDP)) & TRANSCONF_ENABLE)) in edp_pipe_is_enabled()
208 for (trans = TRANSCODER_A; trans <= TRANSCODER_EDP; trans++) { in emulate_monitor_status_change()
297 TRANS_DDI_FUNC_CTL(display, TRANSCODER_EDP)) |= in emulate_monitor_status_change()
H A Dhandlers.c2294 MMIO_DH(TRANSCONF(display, TRANSCODER_EDP), D_ALL, NULL, in init_generic_mmio_info()