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Searched refs:TO_CYCLES64 (Results 1 – 2 of 2) sorted by relevance

/linux-6.15/drivers/mtd/nand/raw/
H A Drenesas-nand-controller.c919 TIM_SEQ1_TWB(TO_CYCLES64(sdr->tWB_max, period_ns)) | in rnandc_setup_interface()
920 TIM_SEQ1_TRR(TO_CYCLES64(sdr->tRR_min, period_ns)) | in rnandc_setup_interface()
921 TIM_SEQ1_TWW(TO_CYCLES64(sdr->tWW_min, period_ns)); in rnandc_setup_interface()
936 TIM_GEN_SEQ0_D0(TO_CYCLES64(cle - cyc, period_ns)) | in rnandc_setup_interface()
937 TIM_GEN_SEQ0_D1(TO_CYCLES64(cle - cyc, period_ns)) | in rnandc_setup_interface()
938 TIM_GEN_SEQ0_D2(TO_CYCLES64(bef_dly, period_ns)) | in rnandc_setup_interface()
939 TIM_GEN_SEQ0_D3(TO_CYCLES64(ca_to_data, period_ns)); in rnandc_setup_interface()
948 TIM_GEN_SEQ1_D4(TO_CYCLES64(ale - cyc, period_ns)) | in rnandc_setup_interface()
949 TIM_GEN_SEQ1_D5(TO_CYCLES64(ale - cyc, period_ns)) | in rnandc_setup_interface()
950 TIM_GEN_SEQ1_D6(TO_CYCLES64(bef_dly, period_ns)) | in rnandc_setup_interface()
[all …]
H A Dmarvell_nand.c471 #define TO_CYCLES64(ps, period_ns) (DIV_ROUND_UP_ULL(div_u64(ps, 1000), \ macro
2448 nfc_tmg.tR = TO_CYCLES64(sdr->tWB_max + sdr->tR_max, in marvell_nfc_setup_interface()