Searched refs:TILE_SPLIT (Results 1 – 15 of 15) sorted by relevance
450 TILE_SPLIT(split_equal_to_row_size); in gfx_v6_0_tiling_mode_table_init()540 TILE_SPLIT(split_equal_to_row_size); in gfx_v6_0_tiling_mode_table_init()551 TILE_SPLIT(split_equal_to_row_size); in gfx_v6_0_tiling_mode_table_init()559 TILE_SPLIT(split_equal_to_row_size); in gfx_v6_0_tiling_mode_table_init()797 TILE_SPLIT(split_equal_to_row_size); in gfx_v6_0_tiling_mode_table_init()805 TILE_SPLIT(split_equal_to_row_size); in gfx_v6_0_tiling_mode_table_init()880 TILE_SPLIT(split_equal_to_row_size); in gfx_v6_0_tiling_mode_table_init()970 TILE_SPLIT(split_equal_to_row_size); in gfx_v6_0_tiling_mode_table_init()981 TILE_SPLIT(split_equal_to_row_size); in gfx_v6_0_tiling_mode_table_init()989 TILE_SPLIT(split_equal_to_row_size); in gfx_v6_0_tiling_mode_table_init()[all …]
2106 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_64B) | in gfx_v8_0_tiling_mode_table_init()2122 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_2KB) | in gfx_v8_0_tiling_mode_table_init()2126 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_2KB) | in gfx_v8_0_tiling_mode_table_init()2130 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_2KB) | in gfx_v8_0_tiling_mode_table_init()2278 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_64B) | in gfx_v8_0_tiling_mode_table_init()2294 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_2KB) | in gfx_v8_0_tiling_mode_table_init()2298 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_2KB) | in gfx_v8_0_tiling_mode_table_init()2302 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_2KB) | in gfx_v8_0_tiling_mode_table_init()2306 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_2KB) | in gfx_v8_0_tiling_mode_table_init()2467 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_64B) | in gfx_v8_0_tiling_mode_table_init()[all …]
1024 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_64B) | in gfx_v7_0_tiling_mode_table_init()1041 TILE_SPLIT(split_equal_to_row_size)); in gfx_v7_0_tiling_mode_table_init()1048 TILE_SPLIT(split_equal_to_row_size)); in gfx_v7_0_tiling_mode_table_init()1191 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_64B) | in gfx_v7_0_tiling_mode_table_init()1208 TILE_SPLIT(split_equal_to_row_size)); in gfx_v7_0_tiling_mode_table_init()1212 TILE_SPLIT(split_equal_to_row_size)); in gfx_v7_0_tiling_mode_table_init()1216 TILE_SPLIT(split_equal_to_row_size)); in gfx_v7_0_tiling_mode_table_init()1220 TILE_SPLIT(split_equal_to_row_size)); in gfx_v7_0_tiling_mode_table_init()1377 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_64B) | in gfx_v7_0_tiling_mode_table_init()1394 TILE_SPLIT(split_equal_to_row_size)); in gfx_v7_0_tiling_mode_table_init()[all …]
200 # define TILE_SPLIT(x) ((x) << 11) macro
1124 AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT) > 6) in amdgpu_bo_set_tiling_flags()
1931 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in dce_v8_0_crtc_do_set_base()
2013 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in dce_v6_0_crtc_do_set_base()
1992 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in dce_v10_0_crtc_do_set_base()
2042 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in dce_v11_0_crtc_do_set_base()
2499 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_64B) | in si_tiling_mode_table_init()2535 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_64B) | in si_tiling_mode_table_init()2544 TILE_SPLIT(split_equal_to_row_size) | in si_tiling_mode_table_init()2553 TILE_SPLIT(split_equal_to_row_size) | in si_tiling_mode_table_init()2562 TILE_SPLIT(split_equal_to_row_size) | in si_tiling_mode_table_init()2571 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_64B) | in si_tiling_mode_table_init()2652 TILE_SPLIT(split_equal_to_row_size) | in si_tiling_mode_table_init()2759 TILE_SPLIT(split_equal_to_row_size) | in si_tiling_mode_table_init()2768 TILE_SPLIT(split_equal_to_row_size) | in si_tiling_mode_table_init()2777 TILE_SPLIT(split_equal_to_row_size) | in si_tiling_mode_table_init()[all …]
2360 TILE_SPLIT(ADDR_SURF_TILE_SPLIT_64B)); in cik_tiling_mode_table_init()2376 TILE_SPLIT(split_equal_to_row_size)); in cik_tiling_mode_table_init()2387 TILE_SPLIT(split_equal_to_row_size)); in cik_tiling_mode_table_init()2519 TILE_SPLIT(split_equal_to_row_size)); in cik_tiling_mode_table_init()2530 TILE_SPLIT(split_equal_to_row_size)); in cik_tiling_mode_table_init()2663 TILE_SPLIT(split_equal_to_row_size)); in cik_tiling_mode_table_init()2674 TILE_SPLIT(split_equal_to_row_size)); in cik_tiling_mode_table_init()2743 TILE_SPLIT(split_equal_to_row_size)); in cik_tiling_mode_table_init()2754 TILE_SPLIT(split_equal_to_row_size)); in cik_tiling_mode_table_init()2887 TILE_SPLIT(split_equal_to_row_size)); in cik_tiling_mode_table_init()[all …]
1198 # define TILE_SPLIT(x) ((x) << 11) macro
1240 # define TILE_SPLIT(x) ((x) << 11) macro
190 tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT); in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags()
1730 typedef enum TILE_SPLIT { enum1738 } TILE_SPLIT; typedef