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Searched refs:THERM_INTL_MASK (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/radeon/
H A Dtrinityd.h214 # define THERM_INTL_MASK (1 << 25) macro
H A Dcikd.h306 #define THERM_INTL_MASK (1 << 25) macro
H A Dkv_dpm.c1020 thermal_int |= THERM_INTH_MASK | THERM_INTL_MASK; in kv_enable_thermal_int()
1022 thermal_int &= ~(THERM_INTH_MASK | THERM_INTL_MASK); in kv_enable_thermal_int()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0.c875 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_INTL_MASK, 1); in smu_v14_0_set_irq_state()
902 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_INTL_MASK, 0); in smu_v14_0_set_irq_state()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c1344 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_INTL_MASK, 1); in smu_v11_0_set_irq_state()
1366 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_INTL_MASK, 0); in smu_v11_0_set_irq_state()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0.c1270 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_INTL_MASK, 1); in smu_v13_0_set_irq_state()
1292 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_INTL_MASK, 0); in smu_v13_0_set_irq_state()