Searched refs:TG3_64BIT_REG_LOW (Results 1 – 2 of 2) sorted by relevance
18 #define TG3_64BIT_REG_LOW 0x04UL macro322 TG3_64BIT_REG_LOW)325 TG3_64BIT_REG_LOW)
523 if (off == (MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW)) { in tg3_write_indirect_mbox()525 TG3_64BIT_REG_LOW, val); in tg3_write_indirect_mbox()530 TG3_64BIT_REG_LOW, val); in tg3_write_indirect_mbox()542 if ((off == (MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW)) && in tg3_write_indirect_mbox()7613 tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, in tg3_interrupt()9752 tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_LOW, in tg3_rings_reset()9760 tw32(stblk + TG3_64BIT_REG_LOW, mapping & 0xffffffff); in tg3_rings_reset()10498 tw32(HOSTCC_STATS_BLK_HOST_ADDR + TG3_64BIT_REG_LOW, in tg3_reset_hw()17956 intmbx = MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW; in tg3_init_one()17957 rcvmbx = MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW; in tg3_init_one()[all …]