| /linux-6.15/drivers/mtd/nand/raw/ |
| H A D | omap2.c | 61 #define TF(value) (value ? 1 : 0) macro
65 #define P1e(a) (TF(a & NAND_Ecc_P1e) << 2)
66 #define P1o(a) (TF(a & NAND_Ecc_P1o) << 3)
67 #define P2e(a) (TF(a & NAND_Ecc_P2e) << 4)
68 #define P2o(a) (TF(a & NAND_Ecc_P2o) << 5)
69 #define P4e(a) (TF(a & NAND_Ecc_P4e) << 6)
70 #define P4o(a) (TF(a & NAND_Ecc_P4o) << 7)
72 #define P8e(a) (TF(a & NAND_Ecc_P8e) << 0)
73 #define P8o(a) (TF(a & NAND_Ecc_P8o) << 1)
90 #define P8e_s(a) (TF(a & NAND_Ecc_P8e) << 0)
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| /linux-6.15/Documentation/admin-guide/pm/ |
| H A D | intel-speed-select.rst | 75 Intel(R) SST-TF (feature turbo-freq) is supported
293 SST-TF)).
312 "speed-select-turbo-freq" (Intel(R) SST-TF) is supported at both performance
315 The Intel(R) SST-BF and the Intel(R) SST-TF features are built on a foundation
533 if Intel(R) SST-TF is already enabled. In turn, to disable, the Intel(R) SST-TF
728 Intel(R) Speed Select Technology - Turbo Frequency (Intel(R) SST-TF)
747 In the system under test here, Intel(R) SST-TF is supported at the base
842 Get Intel(R) SST-TF Capability
883 Enable Intel(R) SST-TF
886 To enable Intel(R) SST-TF, execute::
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| /linux-6.15/fs/isofs/ |
| H A D | rock.c | 423 if (rr->u.TF.flags & TF_CREATE) { in parse_rock_ridge_inode_internal()
425 iso_date(rr->u.TF.times[cnt++].time, 0), in parse_rock_ridge_inode_internal()
428 if (rr->u.TF.flags & TF_MODIFY) { in parse_rock_ridge_inode_internal()
430 iso_date(rr->u.TF.times[cnt++].time, 0), in parse_rock_ridge_inode_internal()
433 if (rr->u.TF.flags & TF_ACCESS) { in parse_rock_ridge_inode_internal()
435 iso_date(rr->u.TF.times[cnt++].time, 0), in parse_rock_ridge_inode_internal()
438 if (rr->u.TF.flags & TF_ATTRIBUTES) { in parse_rock_ridge_inode_internal()
440 iso_date(rr->u.TF.times[cnt++].time, 0), in parse_rock_ridge_inode_internal()
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| H A D | rock.h | 111 struct RR_TF_s TF; member
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| /linux-6.15/drivers/iommu/ |
| H A D | mtk_iommu_v1.c | 86 #define MT2701_M4U_TF_LARB(TF) (6 - (((TF) >> 13) & 0x7)) argument
87 #define MT2701_M4U_TF_PORT(TF) (((TF) >> 8) & 0xF) argument
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| H A D | msm_iommu_hw-8xxx.h | 461 #define SET_TF(b, c, v) SET_CONTEXT_FIELD(b, c, FSR, TF, v)
649 #define GET_TF(b, c) GET_CONTEXT_FIELD(b, c, FSR, TF)
1018 #define TF (TF_MASK << TF_SHIFT) macro
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| /linux-6.15/Documentation/devicetree/bindings/mtd/partitions/ |
| H A D | binman.yaml | 27 - tfa-bl31 # bl31.bin or bl31.elf from TF-A project
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| /linux-6.15/Documentation/devicetree/bindings/memory-controllers/fsl/ |
| H A D | imx8m-ddrc.yaml | 18 switching is implemented by TF-A code which runs from a SRAM area.
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| /linux-6.15/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-gxbb-odroidc2.dts | 283 gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
317 "J2 Header Pin31", "", "", "", "TF VDD En",
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| /linux-6.15/arch/arm64/boot/dts/qcom/ |
| H A D | sc7280-chrome-common.dtsi | 139 /* TF-A firmware maps memory cached so mark dma-coherent to match. */
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| H A D | sc7180-idp.dts | 394 /* TF-A firmware maps memory cached so mark dma-coherent to match. */
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| H A D | sc7180-trogdor.dtsi | 874 /* TF-A firmware maps memory cached so mark dma-coherent to match. */
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| /linux-6.15/Documentation/devicetree/bindings/mailbox/ |
| H A D | xlnx,zynqmp-ipi-mailbox.yaml | 18 TF-A | |
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| /linux-6.15/arch/arm64/boot/dts/allwinner/ |
| H A D | sun50i-h64-remix-mini-pc.dts | 297 /* Supplies the arisc management core, needed by TF-A to power off cores. */
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| /linux-6.15/Documentation/trace/ |
| H A D | mmiotrace.rst | 129 marks the page present, sets TF flag to achieve single stepping and exits the
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| /linux-6.15/Documentation/admin-guide/media/ |
| H A D | bttv.rst | 816 Provideo PV951 TF,
835 - PV-951T/TF
836 - PV-951PT/TF
837 - PV-956T/TF Low Profile
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| /linux-6.15/net/core/ |
| H A D | filter.c | 10284 #define SOCK_ADDR_STORE_NESTED_FIELD_OFF(S, NS, F, NF, SIZE, OFF, TF) \ argument
10292 offsetof(S, TF)); \
10302 offsetof(S, TF)); \
10306 TF) \ argument
10310 OFF, TF); \
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