Searched refs:TER (Results 1 – 5 of 5) sorted by relevance
21 #define TER 0x0 /* TMU enable */ macro157 val = readl_relaxed(tmu->base + TER); in imx8mm_tmu_enable()161 writel_relaxed(val, tmu->base + TER); in imx8mm_tmu_enable()
37 #define TER(x) (0x40 * (x) + 0x02C) macro
175 writel(0, kmb_i2s->i2s_base + TER(i)); in kmb_i2s_disable_channels()566 writel(1, kmb_i2s->i2s_base + TER(ch_reg)); in kmb_i2s_config()
45 #define TER(x) (0x40 * x + 0x02C) macro
47 i2s_write_reg(dev->i2s_base, TER(i), 0); in i2s_disable_channels()260 i2s_write_reg(dev->i2s_base, TER(ch_reg), TER_TXCHEN | in dw_i2s_config()