Searched refs:TENSOR_SMC_PMU_SEC_REG (Results 1 – 1 of 1) sorted by relevance
27 #define TENSOR_SMC_PMU_SEC_REG 0x82000504 macro60 arm_smccc_smc(TENSOR_SMC_PMU_SEC_REG, pmu_base + reg, in tensor_sec_reg_write()77 arm_smccc_smc(TENSOR_SMC_PMU_SEC_REG, pmu_base + reg, in tensor_sec_reg_rmw()