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Searched refs:TEGRA234_CLK_PLLP_OUT0 (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/arch/arm64/boot/dts/nvidia/
H A Dtegra234.dtsi183 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2791 <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2793 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2810 <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2812 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2829 <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2848 <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2867 <&bpmp TEGRA234_CLK_PLLP_OUT0>;
2893 <&bpmp TEGRA234_CLK_PLLP_OUT0>;
3861 <&bpmp TEGRA234_CLK_PLLP_OUT0>;
[all …]
H A Dtegra234-p3768-0000+p3767.dtsi56 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
H A Dtegra234-p3737-0000+p3701.dtsi93 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
/linux-6.15/include/dt-bindings/clock/
H A Dtegra234-clock.h205 #define TEGRA234_CLK_PLLP_OUT0 102U macro