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Searched refs:SSPP_VIG0 (Results 1 – 25 of 36) sorted by relevance

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/linux-6.15/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_cfg.c28 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4, [SSPP_VIG2] = 7,
117 [SSPP_VIG0] = 1,
198 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4, [SSPP_VIG2] = 7,
286 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4,
386 [SSPP_VIG0] = 1, [SSPP_DMA0] = 4,
458 [SSPP_VIG0] = 1, [SSPP_DMA0] = 4,
538 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4,
757 [SSPP_VIG0] = 1, [SSPP_VIG1] = 9,
H A Dmdp5_ctl.c293 case SSPP_VIG0: return MDP5_CTL_LAYER_REG_VIG0(stage); in mdp_ctl_blend_mask()
316 case SSPP_VIG0: return MDP5_CTL_LAYER_EXT_REG_VIG0_BIT3; in mdp_ctl_blend_ext_mask()
444 case SSPP_VIG0: return MDP5_CTL_FLUSH_VIG0; in mdp_ctl_flush_mask_pipe()
/linux-6.15/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_top.c96 status->sspp[SSPP_VIG0] = (value >> 4) & 0x3; in dpu_hw_get_danger_status()
208 status->sspp[SSPP_VIG0] = (value >> 4) & 0x1; in dpu_hw_get_safe_status()
H A Ddpu_plane.c238 pipe->sspp->idx - SSPP_VIG0, in _dpu_plane_calc_fill_level()
282 pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_qos_lut()
286 trace_dpu_perf_set_qos_luts(pipe->sspp->idx - SSPP_VIG0, in _dpu_plane_set_qos_lut()
291 pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_qos_lut()
295 trace_dpu_perf_set_danger_luts(pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_qos_lut()
302 pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_qos_lut()
327 pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_qos_ctrl()
406 qos_params.num = pipe->sspp->idx - SSPP_VIG0; in _dpu_plane_set_qos_remap()
H A Ddpu_hw_mdss.h93 SSPP_VIG0, enumerator
H A Ddpu_hw_ctl.c189 case SSPP_VIG0: in dpu_hw_ctl_update_pending_flush_sspp()
476 [SSPP_VIG0] = { { 0, 0, 0 }, { 3, 0 } },
/linux-6.15/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_6_3_sm6115.h39 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_6_5_qcm2290.h39 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_6_9_sm6375.h40 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_4_1_sdm670.h26 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_1_15_msm8917.h48 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_1_14_msm8937.h48 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_1_16_msm8953.h48 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_5_4_sm6125.h70 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_6_2_sc7180.h52 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_3_3_sdm630.h63 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_6_4_sm6350.h60 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_7_2_sc7280.h57 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_5_3_sm6150.h70 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_3_2_sdm660.h64 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_3_0_msm8998.h69 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_5_2_sm7150.h73 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_1_7_msm8996.h64 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_4_0_sdm845.h67 .name = "sspp_0", .id = SSPP_VIG0,
H A Ddpu_5_0_sm8150.h77 .name = "sspp_0", .id = SSPP_VIG0,

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