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Searched refs:SRST_CORE0_PO (Results 1 – 9 of 9) sorted by relevance

/linux-6.15/include/dt-bindings/reset/
H A Drockchip,rk3528-cru.h11 #define SRST_CORE0_PO 0 macro
/linux-6.15/include/dt-bindings/clock/
H A Drk3128-cru.h150 #define SRST_CORE0_PO 0 macro
H A Drk3228-cru.h150 #define SRST_CORE0_PO 0 macro
H A Drk3308-cru.h218 #define SRST_CORE0_PO 0 macro
H A Drk3328-cru.h205 #define SRST_CORE0_PO 0 macro
H A Drk3288-cru.h203 #define SRST_CORE0_PO 4 macro
H A Dpx30-cru.h197 #define SRST_CORE0_PO 0 macro
H A Drockchip,rv1126-cru.h390 #define SRST_CORE0_PO 0 macro
/linux-6.15/drivers/clk/rockchip/
H A Drst-rk3528.c18 RK3528_CRU_RESET_OFFSET(SRST_CORE0_PO, 3, 0),