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Searched refs:SRI_ARR (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.h177 SRI_ARR(HDMI_CONTROL, DIG, id), SRI_ARR(HDMI_DB_CONTROL, DIG, id), \
195 SRI_ARR(HDMI_ACR_32_0, DIG, id), SRI_ARR(HDMI_ACR_32_1, DIG, id), \
196 SRI_ARR(HDMI_ACR_44_0, DIG, id), SRI_ARR(HDMI_ACR_44_1, DIG, id), \
197 SRI_ARR(HDMI_ACR_48_0, DIG, id), SRI_ARR(HDMI_ACR_48_1, DIG, id), \
198 SRI_ARR(DP_DB_CNTL, DP, id), SRI_ARR(DP_MSA_MISC, DP, id), \
199 SRI_ARR(DP_MSA_VBID_MISC, DP, id), SRI_ARR(DP_MSA_COLORIMETRY, DP, id), \
204 SRI_ARR(DP_MSE_RATE_CNTL, DP, id), SRI_ARR(DP_MSE_RATE_UPDATE, DP, id), \
205 SRI_ARR(DP_PIXEL_FORMAT, DP, id), SRI_ARR(DP_SEC_CNTL, DP, id), \
206 SRI_ARR(DP_SEC_CNTL1, DP, id), SRI_ARR(DP_SEC_CNTL2, DP, id), \
207 SRI_ARR(DP_SEC_CNTL5, DP, id), SRI_ARR(DP_SEC_CNTL6, DP, id), \
[all …]
H A Ddcn401_resource.c112 #define SRI_ARR(reg_name, block, id)\ macro
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.h66 SRI_ARR(VPG_MEM_PWR, VPG, id)
77 SRI_ARR(AFMT_MEM_PWR, AFMT, id)
81 SRI_ARR(AFMT_CNTL, DIG, id), \
82 SRI_ARR(DIG_FE_CNTL, DIG, id), \
85 SRI_ARR(HDMI_GC, DIG, id), \
108 SRI_ARR(DP_DB_CNTL, DP, id), \
109 SRI_ARR(DP_MSA_MISC, DP, id), \
119 SRI_ARR(DP_SEC_CNTL, DP, id), \
125 SRI_ARR(DP_VID_M, DP, id), \
126 SRI_ARR(DP_VID_N, DP, id), \
[all …]
H A Ddcn35_resource.c145 #define SRI_ARR(reg_name, block, id)\ macro
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.h251 SRI_ARR(AFMT_60958_0, AFMT, id), SRI_ARR(AFMT_60958_1, AFMT, id), \
252 SRI_ARR(AFMT_60958_2, AFMT, id), SRI_ARR(AFMT_MEM_PWR, AFMT, id)
256 SRI_ARR(APG_CONTROL, APG, id), SRI_ARR(APG_CONTROL2, APG, id), \
257 SRI_ARR(APG_MEM_PWR, APG, id), SRI_ARR(APG_DBG_GEN_CONTROL, APG, id)
261 SRI_ARR(AFMT_CNTL, DIG, id), SRI_ARR(DIG_FE_CNTL, DIG, id), \
262 SRI_ARR(HDMI_CONTROL, DIG, id), SRI_ARR(HDMI_DB_CONTROL, DIG, id), \
280 SRI_ARR(HDMI_ACR_32_0, DIG, id), SRI_ARR(HDMI_ACR_32_1, DIG, id), \
281 SRI_ARR(HDMI_ACR_44_0, DIG, id), SRI_ARR(HDMI_ACR_44_1, DIG, id), \
282 SRI_ARR(HDMI_ACR_48_0, DIG, id), SRI_ARR(HDMI_ACR_48_1, DIG, id), \
283 SRI_ARR(DP_DB_CNTL, DP, id), SRI_ARR(DP_MSA_MISC, DP, id), \
[all …]
H A Ddcn32_resource.c129 #define SRI_ARR(reg_name, block, id)\ macro
/linux-6.15/drivers/gpu/drm/amd/display/dc/hubp/dcn401/
H A Ddcn401_hubp.h39 SRI_ARR(HUBP_3DLUT_ADDRESS_HIGH, CURSOR0_, inst),\
40 SRI_ARR(HUBP_3DLUT_ADDRESS_LOW, CURSOR0_, inst),\
41 SRI_ARR(HUBP_3DLUT_CONTROL, CURSOR0_, inst),\
42 SRI_ARR(HUBP_3DLUT_DLG_PARAM, CURSOR0_, inst)
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c130 #define SRI_ARR(reg_name, block, id)\ macro
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn36/
H A Ddcn36_resource.c130 #define SRI_ARR(reg_name, block, id)\ macro
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn351/
H A Ddcn351_resource.c125 #define SRI_ARR(reg_name, block, id)\ macro