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Searched refs:SRC_TOP0 (Results 1 – 5 of 5) sorted by relevance

/linux-6.15/drivers/clk/samsung/
H A Dclk-exynos3250.c31 #define SRC_TOP0 0xc210 macro
120 SRC_TOP0,
260 MUX(CLK_MOUT_EBI, "mout_ebi", mout_ebi_p, SRC_TOP0, 28, 1),
261 MUX(CLK_MOUT_ACLK_200, "mout_aclk_200", group_div_mpll_pre_p, SRC_TOP0, 24, 1),
262 MUX(CLK_MOUT_ACLK_160, "mout_aclk_160", group_div_mpll_pre_p, SRC_TOP0, 20, 1),
263 MUX(CLK_MOUT_ACLK_100, "mout_aclk_100", group_div_mpll_pre_p, SRC_TOP0, 16, 1),
264 MUX(CLK_MOUT_ACLK_266_1, "mout_aclk_266_1", mout_aclk_266_1_p, SRC_TOP0, 14, 1),
266 MUX(CLK_MOUT_ACLK_266, "mout_aclk_266", mout_aclk_266_p, SRC_TOP0, 12, 1),
267 MUX(CLK_MOUT_VPLL, "mout_vpll", mout_vpll_p, SRC_TOP0, 8, 1),
268 MUX(CLK_MOUT_EPLL_USER, "mout_epll_user", mout_epll_user_p, SRC_TOP0, 4, 1),
[all …]
H A Dclk-exynos4.c40 #define SRC_TOP0 0xc210 macro
199 SRC_TOP0,
434 MUX(0, "mout_onenand1", mout_onenand1_p, SRC_TOP0, 0, 1),
436 MUX(0, "mout_onenand", mout_onenand_p, SRC_TOP0, 28, 1),
456 MUX(0, "mout_aclk200", sclk_ampll_p4210, SRC_TOP0, 12, 1),
457 MUX(0, "mout_aclk100", sclk_ampll_p4210, SRC_TOP0, 16, 1),
458 MUX(0, "mout_aclk160", sclk_ampll_p4210, SRC_TOP0, 20, 1),
534 MUX(0, "mout_aclk200", aclk_p4412, SRC_TOP0, 12, 1),
535 MUX(0, "mout_aclk100", aclk_p4412, SRC_TOP0, 16, 1),
536 MUX(0, "mout_aclk160", aclk_p4412, SRC_TOP0, 20, 1),
[all …]
H A Dclk-exynos5420.c52 #define SRC_TOP0 0x10200 macro
187 SRC_TOP0,
474 MUX(0, "mout_aclk400_isp", mout_group3_5800_p, SRC_TOP0, 0, 3),
557 MUX(0, "mout_aclk400_isp", mout_group1_p, SRC_TOP0, 0, 2),
558 MUX(0, "mout_aclk400_mscl", mout_group1_p, SRC_TOP0, 4, 2),
559 MUX(0, "mout_aclk400_wcore", mout_group1_p, SRC_TOP0, 16, 2),
560 MUX(0, "mout_aclk100_noc", mout_group1_p, SRC_TOP0, 20, 2),
614 MUX(0, "mout_aclk200", mout_group1_p, SRC_TOP0, 8, 2),
615 MUX(0, "mout_aclk200_fsys2", mout_group1_p, SRC_TOP0, 12, 2),
616 MUX(0, "mout_pclk200_fsys", mout_group1_p, SRC_TOP0, 24, 2),
[all …]
H A Dclk-exynos5250.c41 #define SRC_TOP0 0x10210 macro
125 SRC_TOP0,
272 MUX(0, "mout_aclk166", mout_aclk166_p, SRC_TOP0, 8, 1),
273 MUX(0, "mout_aclk200", mout_aclk200_p, SRC_TOP0, 12, 1),
274 MUX(0, "mout_aclk300_disp1_mid", mout_aclk200_p, SRC_TOP0, 14, 1),
275 MUX(0, "mout_aclk300", mout_aclk300_p, SRC_TOP0, 15, 1),
276 MUX(0, "mout_aclk333", mout_aclk166_p, SRC_TOP0, 16, 1),
277 MUX(0, "mout_aclk400_g3d_mid", mout_aclk200_p, SRC_TOP0, 20, 1),
H A Dclk-exynos5410.c40 #define SRC_TOP0 0x10210 macro
118 MUX(0, "mout_aclk200", mpll_bpll_p, SRC_TOP0, 12, 1),
119 MUX(0, "mout_aclk400", mpll_bpll_p, SRC_TOP0, 20, 1),