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Searched refs:SRC_MASK_FSYS (Results 1 – 5 of 5) sorted by relevance

/linux-6.15/drivers/clk/samsung/
H A Dclk-exynos5410.c45 #define SRC_MASK_FSYS 0x10340 macro
174 SRC_MASK_FSYS, 0, CLK_SET_RATE_PARENT, 0),
176 SRC_MASK_FSYS, 4, CLK_SET_RATE_PARENT, 0),
178 SRC_MASK_FSYS, 8, CLK_SET_RATE_PARENT, 0),
H A Dclk-exynos5250.c55 #define SRC_MASK_FSYS 0x10340 macro
139 SRC_MASK_FSYS,
480 SRC_MASK_FSYS, 0, CLK_SET_RATE_PARENT, 0),
482 SRC_MASK_FSYS, 4, CLK_SET_RATE_PARENT, 0),
484 SRC_MASK_FSYS, 8, CLK_SET_RATE_PARENT, 0),
486 SRC_MASK_FSYS, 12, CLK_SET_RATE_PARENT, 0),
488 SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0),
490 SRC_MASK_FSYS, 28, CLK_SET_RATE_PARENT, 0),
H A Dclk-exynos4.c62 #define SRC_MASK_FSYS 0xc340 macro
215 SRC_MASK_FSYS,
272 { .offset = SRC_MASK_FSYS, .value = 0x01011111, },
771 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc_pre0", SRC_MASK_FSYS, 0,
773 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "div_mmc_pre1", SRC_MASK_FSYS, 4,
775 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "div_mmc_pre2", SRC_MASK_FSYS, 8,
777 GATE(CLK_SCLK_MMC3, "sclk_mmc3", "div_mmc_pre3", SRC_MASK_FSYS, 12,
779 GATE(CLK_SCLK_MMC4, "sclk_mmc4", "div_mmc_pre4", SRC_MASK_FSYS, 16,
944 SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0),
986 SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0),
H A Dclk-exynos5420.c79 #define SRC_MASK_FSYS 0x10340 macro
206 SRC_MASK_FSYS,
286 { .offset = SRC_MASK_FSYS, .value = 0x11111110, },
1052 SRC_MASK_FSYS, 24, CLK_SET_RATE_PARENT, 0),
H A Dclk-exynos3250.c45 #define SRC_MASK_FSYS 0xc340 macro
134 SRC_MASK_FSYS,