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Searched refs:SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9870 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 0x00003f00L macro
H A Dgfx_7_2_sh_mask.h12575 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 0x3f00 macro
H A Dgfx_8_0_sh_mask.h14457 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 0x3f00 macro
H A Dgfx_8_1_sh_mask.h14855 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK 0x3f00 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28504 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK … macro
H A Dgc_9_1_sh_mask.h29714 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK … macro
H A Dgc_9_2_1_sh_mask.h30042 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK … macro
H A Dgc_9_4_3_sh_mask.h31414 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK … macro
H A Dgc_9_4_2_sh_mask.h32772 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK … macro
H A Dgc_11_5_0_sh_mask.h36437 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK … macro
H A Dgc_11_0_0_sh_mask.h41508 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK … macro
H A Dgc_12_0_0_sh_mask.h40249 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK … macro
H A Dgc_10_1_0_sh_mask.h42822 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK … macro
H A Dgc_11_0_3_sh_mask.h44547 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK … macro
H A Dgc_10_3_0_sh_mask.h48065 #define SQ_WAVE_GPR_ALLOC__VGPR_SIZE_MASK … macro