Home
last modified time | relevance | path

Searched refs:SQ_IND_INDEX__INDEX__SHIFT (Results 1 – 24 of 24) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c2965 (address << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_ind()
2977 (regno << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_regs()
H A Dgfx_v9_4_2.c1809 (address << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_ind()
H A Dgfx_v7_0.c4060 (address << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_ind()
4072 (regno << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_regs()
H A Dgfx_v9_4_3.c716 (address << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_ind()
728 (regno << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_regs()
H A Dgfx_v12_0.c801 (address << SQ_IND_INDEX__INDEX__SHIFT)); in wave_read_ind()
811 (regno << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_regs()
H A Dgfx_v8_0.c5181 (address << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_ind()
5193 (regno << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_regs()
H A Dgfx_v11_0.c983 (address << SQ_IND_INDEX__INDEX__SHIFT)); in wave_read_ind()
993 (regno << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_regs()
H A Dgfx_v9_0.c1934 (address << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_ind()
1946 (regno << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_regs()
H A Dgfx_v10_0.c4479 (address << SQ_IND_INDEX__INDEX__SHIFT)); in wave_read_ind()
4489 (regno << SQ_IND_INDEX__INDEX__SHIFT) | in wave_read_regs()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9007 #define SQ_IND_INDEX__INDEX__SHIFT 0x00000010 macro
H A Dgfx_7_2_sh_mask.h12414 #define SQ_IND_INDEX__INDEX__SHIFT 0x10 macro
H A Dgfx_8_0_sh_mask.h14284 #define SQ_IND_INDEX__INDEX__SHIFT 0x10 macro
H A Dgfx_8_1_sh_mask.h14682 #define SQ_IND_INDEX__INDEX__SHIFT 0x10 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2627 #define SQ_IND_INDEX__INDEX__SHIFT macro
H A Dgc_9_1_sh_mask.h2475 #define SQ_IND_INDEX__INDEX__SHIFT macro
H A Dgc_9_2_1_sh_mask.h2433 #define SQ_IND_INDEX__INDEX__SHIFT macro
H A Dgc_9_4_3_sh_mask.h2828 #define SQ_IND_INDEX__INDEX__SHIFT macro
H A Dgc_9_4_2_sh_mask.h26063 #define SQ_IND_INDEX__INDEX__SHIFT macro
H A Dgc_11_5_0_sh_mask.h4271 #define SQ_IND_INDEX__INDEX__SHIFT macro
H A Dgc_11_0_0_sh_mask.h7209 #define SQ_IND_INDEX__INDEX__SHIFT macro
H A Dgc_12_0_0_sh_mask.h23923 #define SQ_IND_INDEX__INDEX__SHIFT macro
H A Dgc_10_1_0_sh_mask.h8111 #define SQ_IND_INDEX__INDEX__SHIFT macro
H A Dgc_11_0_3_sh_mask.h8068 #define SQ_IND_INDEX__INDEX__SHIFT macro
H A Dgc_10_3_0_sh_mask.h8443 #define SQ_IND_INDEX__INDEX__SHIFT macro