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Searched refs:SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h10455 #define SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK 0x7c00000 macro
H A Dgfx_8_1_sh_mask.h10853 #define SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK 0x7c00000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12297 #define SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK … macro
H A Dgc_9_1_sh_mask.h13677 #define SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK … macro
H A Dgc_9_2_1_sh_mask.h13473 #define SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK … macro
H A Dgc_9_4_3_sh_mask.h15824 #define SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK … macro
H A Dgc_9_4_2_sh_mask.h24907 #define SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK … macro
H A Dgc_11_5_0_sh_mask.h13879 #define SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK … macro
H A Dgc_11_0_0_sh_mask.h17185 #define SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK … macro
H A Dgc_12_0_0_sh_mask.h27208 #define SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK … macro
H A Dgc_10_1_0_sh_mask.h19678 #define SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK … macro
H A Dgc_11_0_3_sh_mask.h19428 #define SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK … macro
H A Dgc_10_3_0_sh_mask.h18039 #define SPI_WCL_PIPE_PERCENT_HP3D__GS_GRP_VALUE_MASK … macro