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Searched refs:SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h10441 #define SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK 0x1f000 macro
H A Dgfx_8_1_sh_mask.h10839 #define SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK 0x1f000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12288 #define SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK … macro
H A Dgc_9_1_sh_mask.h13668 #define SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK … macro
H A Dgc_9_2_1_sh_mask.h13464 #define SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK … macro
H A Dgc_9_4_3_sh_mask.h15815 #define SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK … macro
H A Dgc_9_4_2_sh_mask.h24898 #define SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK … macro
H A Dgc_11_5_0_sh_mask.h13871 #define SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK … macro
H A Dgc_11_0_0_sh_mask.h17177 #define SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK … macro
H A Dgc_12_0_0_sh_mask.h27200 #define SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK … macro
H A Dgc_10_1_0_sh_mask.h19669 #define SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK … macro
H A Dgc_11_0_3_sh_mask.h19420 #define SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK … macro
H A Dgc_10_3_0_sh_mask.h18031 #define SPI_WCL_PIPE_PERCENT_GFX__HS_GRP_VALUE_MASK … macro