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Searched refs:SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h8840 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h10458 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h10856 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT 0x0 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12299 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT … macro
H A Dgc_9_1_sh_mask.h13679 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h13475 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h15826 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h24909 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h13881 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h17187 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h27210 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h19680 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h19430 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h18041 #define SPI_WCL_PIPE_PERCENT_CS0__VALUE__SHIFT … macro